US 6,640,315 B1Granted

Method and apparatus for enhancing instruction level parallelism

AssigneeThe Board of Trustees of the University of Illinois

InventorsWen-mei W. Hwu, Daniel A. Connors, David I. August, John W. Sias

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Abstract

Disclosed is a method and system for handling inline recovery from speculatively executed instructions. Each register may be provided with an E-tag, that, when set, indicates an exception occurred in the generation of the value stored in its register, and an R-tag, which is used to manage data flow dependencies in recovery mode. Recovery is performed by re-executing speculatively those set of speculative instructions that are data flow dependent upon a first excepting speculative instruction. The disclosed invention provides an architecture and method for efficient exception handling when combining control speculation, data speculation and predication, thereby resulting in substantially enhanced instruction level parallelism.

Claims10

Dependent claims

In a microprocessor system that supports non-speculative and speculative execution of instructions, a method for performing inline recovery for a first excepting speculative instruction where execution was deferred because a first exception event was encountered during speculative execution, said method comprising the steps of:

when said first exception event is encountered during speculative execution, storing information to indicate that said first exception event occurred and storing information relating to a program counter associated with said first excepting speculative instruction,
for a subsequent speculative instruction that is data flow dependent upon said first excepting speculative instructions deferring execution of said subsequent speculative instruction, propagating and storing exception information for said first excepting speculative instruction in association with said subsequent speculative instruction, and
for a subsequent non-speculative instruction that is data flow dependent upon said first excepting speculative instruction, performing an inline recovery process that re-executes speculatively those set of speculative instructions that are data flow dependent upon said first excepting instruction.

Dependencies are inferred from the claim text.