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US 6,640,300 B1Granted
Method and apparatus for width and depth expansion in a multi-queue system
AssigneeCypress Semiconductor Corporation
InventorS. Babar Raza
Life of this patent
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Abstract
An apparatus configured to read and write data in a plurality of memories. The plurality of memories may be configured to store and present the data in response to (i) a write data path and (ii) a read data path. One of the plurality of memories may be configured to control the remainder of the plurality of memories in response to one or more write signals and (ii) one or more read signals.
Claims31
An apparatus configured to read and write data comprising:
- a first memory configured to store and present said data at a speed of an external device (i) from a write data path and (ii) to a read data path;
- and
- one or more second memories configured to store and present said data at said speed of said external device (i) from said write data path and (ii) to said read data path, wherein said first memory is configured to receive control information from said write data path and said read data path and control said one or more second memories via a plurality of write expansion signals and a plurality of read expansion signals in response to (i) one or more write signals and (ii) one or more read signals.
An apparatus configured to read and write data comprising:
- means for storing and presenting said data in response to (i) a write data path and (ii) a read data path comprising a first memory and one or more second memories, wherein said first memory is configured to control said one or more second memories via a plurality of expansion signals in response to one or more write signals and (ii) one or more read signals;
- means for controlling a width of said storing and presenting means;
- and
- means for controlling a depth of said storing and presenting means.
1 more element
A method for reading and writing data comprising the steps of:
- (A) storing said data to and presenting said data from a first memory in response to (i) a write management interface and (ii) a read management interface and storing said data to and presenting said data from one or more second memories in response to (i) a write expansion interface and (ii) a read expansion interface;
- and
- (B) controlling a width and depth of one or more queues in said first and second memories in response to one or more configuration signals.
Dependencies are inferred from the claim text.