System and method for controlling retire buffer operation in a memory system

A method of controlling data access in a memory system comprising a memory controller and at least one memory device having a retire buffer, the method comprising:

• in a first time period, receiving a first write request having an associated first write address and first write data;
• transporting the first write data to a memory device retire buffer, and storing the first write address in an un-retired write buffer in the memory controller;
• and thereafter,
• (a) in a second time period following the first time period, upon receiving in the memory controller a non-read/write request,
• issuing the non-read/write request, retiring the first write data, and removing the first write address from the un-retired write buffer;
• (b) in the second time period, upon receiving in the memory controller a second write request having an associated second write address and second write data,
• transporting the second write data to a memory device retire buffer, and storing the second write address in an un-retired write buffer in the memory controller;
• (c) in the second time period, upon receiving in the memory controller a read request having an associated read address, comparing the read address to the first write address stored in the un-retired write buffer;
• and,
• upon determining that the read address is different from the first write address, issuing the read request, retiring the first write data, and removing the first write data from the un-retired write buffer, and
• upon determining that the read address is the same as the first write address, stalling the read request, retiring the first write data, and removing the first write data from the un-retired write buffer.

A method of retiring data in a memory system comprising a memory controller receiving memory requests, and at least one memory device having a retire buffer, the method comprising:

• upon receiving a first write request in the memory controller during a first time period, transporting first write data associated with the first write request from the memory controller to a memory device retire buffer, storing a first write address associated with the first write request in an un-retired write buffer in the memory controller, and entering a write state;
• during a second time period, immediately following the first time period, holding the first write data in the retire buffer;
• and,
• during a third time period immediately following the second time period, retiring the first write data into memory and removing the first write address from the un-retired write buffer.

A memory system, comprising:

• a plurality of memory devices, each comprising a retire buffer;
• a memory controller configured to receive a read request, and comprising:
• an un-retired data buffer capable of storing a plurality of write addresses, including a first write address, each write address being associated with un-retired write data in a retire buffer;
• and
• a comparator configured to receive and compare the plurality of write addresses in the un-retired data buffer with a read address associated with the read request;
• wherein the memory controller is configured such that:
• upon determining in the comparator that a write address in the un-retired data buffer and the read address are the same, the read request is stalled in the memory controller;
• during a second time period during which the read request is received, which immediately follows a first time period during which the first write address was stored in the un-retired data buffer, the first write address remains stored in the un-retire data buffer;
• and,
• during a third time period immediately following the second time period, the first write data is retired into memory and the first write address is removed from the un-retired write buffer.

A memory system controlling data access, comprising:

• a memory device comprising a retire buffer;
• a memory controller configured to receive receiving a read request, and comprising:
• an un-retired data buffer capable of holding at least one a first write address associated with un-retired first write data stored in the retire buffer;
• and
• a comparator configured to receive and compare receiving and comparing the at least one the first write address with a read address associated with the read request;
• wherein the memory controller is configured such that
• upon determining in the comparator that the at least one first write address and the read address are the same, the read request is stalled in the memory controller;
• during a second time period during which the read request is received, which follows a first time period during which the first write address is stored in the un-retired data buffer, the first write address remains stored in the un-retire data buffer;
• and,
• during a third time period following the second time period, the first write data is retired into memory and the first write address is removed from the un-retired write buffer.