Software controlled cache line ownership affinity enhancements in a multiprocessor environment
AssigneeUnisys Corporation
InventorsDuane J. McCrory, Anthony P. Gold, Andrew Sanderson
Life of this patent
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AssigneeUnisys Corporation
InventorsDuane J. McCrory, Anthony P. Gold, Andrew Sanderson
Estimating the term…
An enhanced cache line directory entry includes at least one affinity bit that indicates an affinity for a particular type of cache line ownership. The affinity bit is used to modify a request for a cache line in accordance with the indicated affinity. The affinity bit may represent an affinity for read-only requests, and the affinity bit may represent an affinity for read-write requests. For example, if an I/O affinity bit is in the set state and an I/O device requests a cache line with read-write permission, the request may be converted to a read-only request in accordance with the indicated affinity. As another example, if a processor affinity bit is in the set state and a processor requests a cache line with read-only permission, the request may be converted to a read-write request. Software control of the affinity bits enables system performance to be tuned and cache coherency operations can thereby be reduced.
A data structure for storing a cache line directory entry for a given cache line of a multi-processor system, the data structure comprising:
A computer system comprising:
A method for requesting a cache line in a multi-processor computer system, said method comprising:
Dependencies are inferred from the claim text.