Hot replace power control sequence logic
AssigneeHewlett-Packard Development Company, L.P.
InventorsJohn M. MacLaren, Jerome J. Johnson, Robert A. Lester, Gary J. Piccirillo, John E. Larson, Christian H. Post, Jeffery Galloway, Ho M. Lai, Eric Rose
Life of this patent
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Abstract
The control logic for a hot-pluggable memory cartridge for use in a redundant memory system. To implement a hot-pluggable memory cartridge in a redundant memory system, control logic to control the sequence of events for powering-up and powering-down a memory cartridge is provided.
Claims23
A method of powering-up a segment of semiconductor memory in a computer system, comprising the acts of:
- (a) inserting the segment of semiconductor memory into the computer system while the computer system is operating, wherein inserting the segment of semiconductor memory comprises connecting one or more first insertion removal sense pins from the segment of semiconductor memory, thereby causing the assertion of a power signal to a power controller;
- (b) initializing the segment of semiconductor memory while the computer system is operating;
- (c) rebuilding the segment of semiconductor memory while the computer system is operating;
- and
- (d) verifying the segment of semiconductor memory for validity while the computer system is operating.
A method of powering-down a segment of a redundant memory in a computer system, the segment comprising a memory cartridge, comprising the acts of:
- (a) generating an interrupt to the computer system;
- (b) verifying that the computer system is in a redundant mode of operation;
- (c) executing a power-down sequence from a data-controller;
- and
- (d) generating an interrupt to the computer system indicating that the power-down sequence is complete.
A method of inserting a memory cartridge into a cartridge connector, comprising the acts of:
- (a) connecting a ground pin from the memory cartridge to the cartridge connector;
- (b) connecting a power pin from the memory cartridge to the cartridge connector;
- (c) connecting a first insertion sense pin from the memory cartridge to the cartridge connector;
- (d) asserting a present detect signal to a host controller;
- (e) asserting a power enable signal to a power controller;
- (f) asserting a power signal supplied through the power pin to implement a soft-start of the memory cartridge;
- (g) connecting signal pins from the memory cartridge to the cartridge connector;
- (h) connecting a second insertion pin from the memory cartridge to the cartridge connector;
- (i) asserting an insertion removal sense signal to the host controller;
- (j) generating a system interrupt;
- (k) de-asserting a power fault signal when a voltage supplied to the memory cartridge is greater than a threshold voltage;
- (l) asserting a clock enable signal to enable a system clock to a memory control device;
- (m) asserting a control signal to the memory cartridge to enable the internal PLLs in the memory control device;
- (n) asserting a power good signal to the memory cartridge to indicate that the power signal is received by the memory cartridge;
- (o) unlocking a system lock configured to secure the memory cartridge in the cartridge connector;
- (p) asserting a pre-insertion removal notification signal to the host controller;
- (q) generating an interrupt indicating that the memory cartridge is ready to be powered-up;
- and
- (r) initializing the memory cartridge.
A method for removing a memory cartridge from a cartridge connector comprising the acts of:
- (a) unlocking the memory cartridge;
- (b) de-asserting a pre-insertion removal notification signal to a host controller;
- (c) generating a system interrupt;
- (d) powering down the memory cartridge;
- (e) disconnecting a first insertion pin from the memory cartridge to the cartridge connector;
- (f) de-asserting an insertion removal signal to the host controller;
- (g) disconnecting signal pins from the memory cartridge to the cartridge connector;
- (h) disconnecting a second insertion pin from the memory cartridge to the cartridge connector;
- (i) de-asserting a present detect signal;
- (j) generating a system interrupt;
- (k) de-asserting power to the power controller;
- (l) asserting a power fault signal to the host controller when a voltage supplied to the memory cartridge is less than a threshold voltage;
- (m) de-asserting a clock enable signal;
- (n) disconnecting a system clock to a memory control device;
- (o) de-asserting a power good signal to the memory control device;
- (p) disconnecting a power pin from the memory cartridge to the cartridge connector;
- and
- (q) disconnecting a ground pin from the memory cartridge to the cartridge connector.
A method of powering-up a segment of semiconductor memory in a computer system, comprising the acts of:
- (a) inserting the segment of semiconductor memory into the computer system while the computer system is operating, wherein inserting the segment of semiconductor memory comprises connecting one or more second insertion removal sense pins from the segment of semiconductor memory, thereby generating an interrupt from a host controller indicating that the segment of semiconductor memory has been installed;
- (b) initializing the segment of semiconductor memory while the computer system is operating;
- (c) rebuilding the segment of semiconductor memory while the computer system is operating;
- and
- (d) verifying the segment of semiconductor memory for validity while the computer system is operating.
Dependencies are inferred from the claim text.