Semiconductor device having self test function

Abstract

The present invention relates to an LSI which performs a self test using its built-in test function according to a test program stored in an on-chip memory. An object of the present invention is to efficiently perform the self test in the case where branching to an address out of the address space of the on-chip memory occurs. A program counter 101 stores addresses of a memory 117 and an external memory. A test program counter 108 stores an address of the memory 117. In a test mode, a program counter switching section 109 performs control so that when an address of the memory 117 is detected in the program counter 101, the address value of the program counter 101 is selected, whereas when an address of the external memory is detected in the program counter 101, the address value of the test program counter 108 is selected. A signature compression circuit 110 signature-compresses and holds the output value of the program counter 101.

Dependencies are inferred from the claim text.