Apparatus and method for efficient binary phase shift key data demodulation

A binary phase shift key demodulator for a signal conveying bits, said demodulator comprising:

• means for associating an I, Q vector to a reference bit;
• means for associating an I, Q vector to a subsequent bit;
• means for interpreting the subsequent bit as a first binary value if the vector associated with the subsequent bit is within a first range of vector angles from the vector associated with the reference bit;
• means for interpreting the subsequent bit as a second binary value if the vector associated with the subsequent bit is outside of a second range of vector angles from the vector associated with the reference bit;
• and
• means for processing information associated with the subsequent bit to determine whether to interpret the subsequent bit as the first or second binary value if the vector associated with the subsequent bit is outside the first range of angles and within the second range of angles from the vector associated with the reference vector, and for accordingly interpreting the bit.

A method of binary phase shift key demodulation for a signal conveying bits, said method comprising:

• associating an I, Q vector with a bit;
• assigning a first group of vector angles to a first binary value;
• assigning a second group of vector angles to a second binary value;
• assigning a third group of vector angles as an indeterminate binary value;
• interpreting the bit as the first binary value if the associated vector is within the first group;
• interpreting the bit as the second binary value if the associated vector is within the second group;
• and
• processing information associated with the bit to determine whether to interpret the bit as the first or second binary value if the associated vector is within the third group, and for accordingly interpreting the bit.

A method of binary phase shift key demodulation for a signal conveying bits, said method comprising:

• associating an I, Q vector to a reference bit;
• associating an I, Q vector to a subsequent bit;
• interpreting the subsequent bit as a first binary value if the vector associated with the subsequent bit is within a first range of vector angles from the vector associated with the reference bit;
• interpreting the subsequent bit as a second binary value if the vector associated with the subsequent bit is outside of a second range of vector angles from the vector associated with the reference bit;
• and
• processing information associated with the subsequent bit to determine whether to interpret the subsequent bit as the first or second binary value if the vector associated with the subsequent bit is outside the first range of angles and within the second range of angles from the vector associated with the reference vector, and for accordingly interpreting the bit.