Semiconductor memory device with block-unit erase type nonvolatile memory
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorSigenori Miyauchi
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Abstract
A CPU calculates a logical block number (LBN) based on a logical sector address (LSA) given by a host and converts the logical block number into a physical address (PBN) of a nonvolatile memory using an address conversion table. Pieces of address conversion table information are dispersively stored in erase blocks (30), and logical block numbers are read from the erase blocks in a power-on state to create the address conversion table on a RAM. When writing data from the host, the data is written in a vacant erase block, and an address of the used vacant erase block is stored by a CPU.
Claims3
A semiconductor memory device having a nonvolatile memory portion of a block-unit erase type for sending and receiving data to and from a host section, the semiconductor memory device comprising:
- an arithmetic processing unit which entirely controls arithmetic processes of the semiconductor memory device and calculates logical block numbers from logical sector addresses given by the host section;
- the nonvolatile memory portion including a plurality of nonvolatile memories for dispersively storing data;
- and
- a conversion table storage portion which holds an address conversion table for converting the calculated logical block numbers into physical addresses serving as erase block numbers of the nonvolatile memories,
- wherein the arithmetic processing unit obtains the logical block numbers and offsets in logical blocks by calculating quotients and residuals, respectively, through dividing the logical sector addresses by a predetermined number of sectors possibly held in one erase block,
- wherein the address conversion table holds the erase block numbers of the nonvolatile memories corresponding to the calculated logical block numbers,
- wherein each of the nonvolatile memories is divided into a plurality of erase blocks, and data erase is performed in units of the erase blocks, and
- wherein pieces of address conversion table information are dispersively stored in each of the erase blocks, and the arithmetic processing unit reads out the logical block numbers from the erase blocks to thereby create the address conversion table on a RAM region of the conversion table storage portion.
Dependencies are inferred from the claim text.