Non-volatile latch circuit that has minimal control circuitry
AssigneeFairchild Semiconductor Corporation
InventorsA. Karl Rapp, Hungyu H. Hou
Life of this patent
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Abstract
A non-volatile latch circuit that has minimal control circuitry is disclosed. The non-volatile latch circuit is typically used in applications where only several bits of data need to be stored in non-volatile memory. The non-volatile latch circuit can be programmed and read using three control signals: a programming voltage/supply voltage signal, a data in signal, and a read/{overscore (write)} signal. By using fewer control signals, the number of transistors used to implement the control circuitry within the non-volatile latch circuit is reduced and thus the non-volatile latch circuit consumes less chip area/volume on an integrated circuit device.
Claims32
A non-volatile latch circuit comprising:
- a storage circuit;
- and
- a control circuit coupled to the storage circuit, the control circuit operable to program a logic value into the storage circuit using only a programming voltage/supply voltage signal, a data input signal, and a read/{overscore (write)} signal, wherein the control circuit is operable to receive an equalize signal, wherein the equalize signal causes a difference in voltage between a first node of the storage circuit and a second node of the storage circuit to be reduced.
A non-volatile latch circuit comprising:
- a storage circuit;
- and
- a control circuit coupled to the storage circuit, the control circuit operable to program a logic value into the storage circuit using only a programming voltage/supply voltage signal, a data input signal, and a read/{overscore (write)} signal, wherein the control circuit includes a first transistor coupled to receive the data input signal and an inverter coupled to receive the data input signal.
A non-volatile latch circuit comprising:
- a storage circuit;
- and
- a control circuit coupled to the storage circuit, the control circuit operable to program a logic value into the storage circuit using only a programming voltage/supply voltage signal, a data input signal, and a read/{overscore (write)} signal, wherein the control circuit includes an inverter coupled to receive the read/{overscore (write)} signal, a first transistor coupled to receive the read/{overscore (write)} signal, and a second transistor coupled to receive the read/{overscore (write)} signal.
A non-volatile latch circuit comprising:
- a storage circuit comprising a first floating gate transistor and a second floating gate transistor;
- and
- a control circuit comprising:
- a third transistor coupled to receive a programming voltage/supply voltage signal and a fourth transistor coupled to receive the programming voltage/supply voltage signal;
- a fifth transistor coupled to receive a data input signal and a first inverter coupled to receive the data input signal;
- and
- a second inverter coupled to receive a read/{overscore (write)} signal, a sixth transistor coupled to receive the read/{overscore (write)} signal, and a seventh transistor coupled to receive the read/{overscore (write)} signal.
A method for programming a non-volatile latch circuit, the method comprising:
- increasing a programming voltage/supply voltage signal from a first voltage value to a second voltage value;
- maintaining the programming voltage/supply voltage signal at the second voltage value while maintaining a data input signal at a constant voltage value and while maintaining a read/{overscore (write)} signal at a constant voltage value;
- and
- decreasing the programming voltage/supply voltage signal from the second voltage value to the first voltage value.
Dependencies are inferred from the claim text.