Static NVRAM with ultra thin tunnel oxides

A method for operating a depletion mode p-channel memory cell, comprising:

• writing a charge on to a floating gate for the memory cell by applying an electric field of approximately +10 mega Volts/centimeter (MV/cm) across a floating gate oxide, wherein the floating gate oxide is less than 30 Angstroms;
• erasing a charge from the floating gate by applying an electric field of approximately −10 mega Volts/centimeter (MV/cm) across the floating gate oxide;
• and
• reading the depletion mode p-channel memory cell by grounding a control gate for the memory cell and driving the memory cell with a small drain voltage of less than −1.0 Volt.

A method for operating a non volatile depletion mode p-channel memory cell array having ultra thin tunnel gate oxides, comprising:

• writing a charge on to a floating gate for a selected memory cell, wherein writing a charge on to a floating gate for a selected memory cell includes:
• driving the source line of the selected cell negative;
• and
• applying a positive potential to a control gate line connected to the selected memory cell and a number of other memory cells in the array, wherein the source lines for the number of other memory cells are grounded, such that an electric field of approximately +10 mega Volts/centimeter (MV/cm) is created across a tunnel gate oxide of the selected cell;
• erasing a charge from a whole row or word, wherein erasing a charge from a whole row or word includes
• grounding a source line for the whole row or word;
• and
• applying a negative potential to a control gate line connected to the whole row or word such that an electric field of approximately −10 mega Volts/centimeter (MV/cm) is created across the tunnel gate oxides of the whole row or word;
• and
• reading a depletion mode p-channel memory cell by grounding a control gate for the memory cell and driving the memory cell with a small drain voltage of less than −1.0 Volt.

A method for operating a non volatile depletion mode p-channel memory cell array having ultra thin tunnel gate oxides, comprising:

• driving a source line of a selected cell with a low potential;
• applying a high potential to a control gate line connected to the selected memory cell and a number of other memory cells in the array such that an electric field of approximately + 10 mega Volts/centimeter (MV/cm) is created across a tunnel gate oxide of the selected cell;
• grounding a source line for a whole row or word;
• applying a low potential to a control gate line connected to the whole row or word such that an electric field of approximately − 10 mega Volts/centimeter (MV/cm) is created across the tunnel gate oxides of the whole row or word;
• and
• grounding a control gate for the memory cell and driving the memory cell with a small drain voltage of less than − 1.0 Volt.

A method for operating a non volatile depletion mode p-channel memory cell array having ultra thin tunnel gate oxides, comprising:

• driving a source line of a selected cell with a low potential;
• applying a high potential to a control gate line connected to the selected memory cell and a number of other memory cells in the array such that approximately 2.3 Volts is applied across a tunnel gate oxide of the selected cell for less than 200 nanoseconds, wherein the tunnel gate oxide is approximately 23 Angstroms;
• grounding a source line for a selected whole row or word;
• applying a low potential to a control gate line connected to the selected whole row or word such that approximately −2.3 Volts is applied across tunnel gate oxides of the whole row or word for less than 200 nanoseconds, wherein the tunnel gate oxides of the whole row or word are approximately 23 Angstroms;
• and
• grounding a control gate for the memory cell and driving the memory cell with a small drain voltage of less than − 1.0 Volt.

A method for operating a non volatile depletion mode p-channel memory cell array having ultra thin tunnel gate oxides, comprising:

• writing a charge of approximately 100 electrons on to a floating gate for a selected depletion mode p-channel memory cell;
• erasing a charge of approximately 100 electrons from each floating gate for a selected row of memory cells;
• and
• reading a depletion mode p-channel memory cell in the array.

A method for operating a non volatile depletion mode p-channel memory cell array having ultra thin tunnel gate oxides, comprising:

• driving a source line of a selected cell with a low potential;
• applying a high potential to a control gate line connected to the selected memory cell and a number of other memory cells in the array such that less than 3.0 Volts is applied across a tunnel gate oxide of the selected cell for less than 20 microseconds, wherein the tunnel gate oxide is less than 50 Angstroms;
• grounding a source line for a selected whole row or word;
• applying a low potential to a control gate line connected to the selected whole row or word such that less than − 3.0 Volts is applied across tunnel gate oxides of the whole row or word for less than 20 microseconds, wherein the tunnel gate oxides of the whole row or word are less than 50 Angstroms;
• and
• grounding a control gate for the memory cell and driving the memory cell with a small negative drain voltage of less than − 1.0 Volt.

A method for operating a depletion mode p-channel memory cell, comprising:

• writing a charge of approximately 100 electrons on to a floating gate of the memory cell;
• reading the depletion mode p-channel memory cell by grounding a control gate for the memory cell and driving the memory cell with a small drain voltage of less than − 1.0 Volt;
• and
• erasing a charge of approximately 100 electrons from the floating gate of the memory cell.