Method and circuit for dynamic reading of a memory cell at low supply voltage and with low output dynamics
AssigneeSTMicroelectronics S.r.l.
InventorsGiovanni Campardo, Rino Micheloni
Life of this patent
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Abstract
The method for reading a memory cell includes supplying the cell with a first charge quantity through a capacitive integration element and reintegrating the first charge quantity through a plurality of second charge quantities supplied alternately and in succession to the capacitive integration element. In a first embodiment, the second charge quantities are initially stored in a plurality of capacitive charge-regeneration elements connected alternately and in succession to the capacitive integration element; the second charge quantities are then shared between the capacitive integration element and the capacitive charge-regeneration elements.
Claims26
A method for reading a memory cell, comprising the steps of:
- supplying said cell with a first charge quantity through a capacitive integration element;
- and
- supplying in sequence said capacitive integration element, through at least one capacitive charge-regeneration element, with a plurality of second charge quantities that restore said first charge quantity.
A device for reading a memory cell, comprising:
- a capacitive integration element supplying said cell with a first charge quantity;
- and
- a charge-packets distributing circuit that includes at least one capacitive charge-regeneration element and supplies in sequence said capacitive integration element with a plurality of second charge quantities for restoring said first charge quantity.
A device for reading a memory cell, comprising:
- a first capacitive element structured to supply the memory cell with a current while the first capacitive element is being discharged;
- a second capacitive element structured to recharge the first capacitive element after the first capacitive element is discharged;
- a charge switch coupled between a power source and the second capacitive element and structured to recharge the second capacitive element;
- and
- a control switch connected between the first and second capacitive elements and structured to selectively disconnect the first and second capacitive elements when the fist capacitive element is supplying the memory cell with the current, the control switch being structured to selectively connect the first and second capacitive elements to enable the second capacitive element to recharge the firs capacitive element.
Dependencies are inferred from the claim text.