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US 6,639,827 B2Granted
Low standby power using shadow storage
AssigneeIntel Corporation
InventorsLawrence T. Clark, Franco Ricci
Life of this patent
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Abstract
An integrated circuit having CMOS transistors processed with different gate-oxide thicknesses. The transistors having the thinner gate-oxide may be used to generate data values that may be stored by the transistors having the thicker gate-oxides. The thicker gate-oxides may reduce gate leakage currents during a system standby mode.
Claims25
A Complementary Metal Oxide Semiconductor (CMOS) circuit comprising:
- a first CMOS section to receive an input signal and provide an output signal, wherein transistors in the first CMOS section have a first gate-oxide thickness;
- and
- a second CMOS section integrated with the first CMOS section where transistors in the second CMOS section have a second gate-oxide thickness that differs from the first gate-oxide thickness, wherein the second CMOS section receives and stores the output signal.
A circuit, comprising:
- a memory cell having cross-coupled inverters for storing a data value and pass transistors for reading and writing the memory cell from a bit line, wherein the cross-coupled inverters and pass transistors have a first gate-oxide thickness;
- and
- transistors for a sense amp coupled to the bit line of the memory cell and having a second gate-oxide thickness that differs from the first gate-oxide thickness, wherein the sense amp receives the data value.
A circuit, comprising:
- a first CMOS section coupled between a virtual ground and a first power conductor to provide an output signal, wherein transistors in the first CMOS section have a first gate-oxide thickness;
- a transistor having conduction terminals to couple the virtual ground to a second power conductor;
- and
- a second CMOS section having a second gate-oxide thickness that differs from the first gate-oxide thickness, wherein the second CMOS section receives and stores the output signal.
1 more element
A latch circuit, comprising:
- a thin gate-oxide portion to receive an input value and having a pass gate device with a thin gate-oxide to provide an output value;
- and
- a thick gate-oxide portion having a storage node to store the output value and having a thick gate-oxide transistor coupled to the pass gate device to receive the output value.
A method for reducing current in a system, comprising;
- generating a data value using circuitry having a first gate-oxide thickness;
- and
- storing the data value using cross-coupled inverters having a second gate-oxide thickness that is greater than the first gate-oxide thickness, wherein the data value is transferred from the circuitry to the cross-coupled inverters.
Dependencies are inferred from the claim text.