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US 6,639,821 B2Granted
Memory circuit with memory elements overlying driver cells
AssigneeKoninklijke Philips Electronics N.V.
InventorStephen J. Battersby
Life of this patent
Estimating the term…
Abstract
A memory device includes an array of memory elements overlying a plurality of driver cells. Vias through an insulating layer connect the driver cells to the memory elements. The vias are distributed over the area of the array to connect the individual driver cells to the respective row and and/or column conductors of the memory array.
Claims10
A memory device comprising:
- a substrate extending in a plane;
- an array of memory elements arranged in a plurality of rows and a plurality of columns arranged substantially parallel to the plane of the substrate and over a predetermined area of the substrate;
- a plurality of row conductors extending along the rows of memory elements and connecting to the memory elements of the respective rows;
- a plurality of column conductors extending along the columns of memory elements and connecting to the memory elements of the respective columns;
- a plurality of driver cells containing drivers for driving the row and/or column conductors, arranged in a layer between the memory array and the substrate, and
- an insulating layer between the driver cells and the array of memory cells, a plurality of conductors passing through the insulating layer distributed over the predetermined area connecting the driver cells to corresponding row or column conductors, wherein said column conductors are individually connected to the plurality of driver cells at a point along an entire column conductor's length.
3 more elements
A method of manufacturing a memory device on a substrate extending in a plane, including
- defining an array of driver cells including at least column drivers over the substrate;
- depositing an insulating layer over the array of driver cells;
- depositing a plurality of column conductors over the insulating layer;
- defining an array of memory elements arranged in a plurality of rows and a plurality of columns substantially over the array of driver cells;
- depositing a plurality of row conductors;
- and
- connecting individual column conductors to their respective column drivers through the insulating layer at a point along the entire length of an individual column conductor, the connections distributed over the area of the array of memory elements.
4 more elements
Dependencies are inferred from the claim text.