US 6,639,818 B1 · Differential non-volatile content addressable memory cell and array

Abstract

A differential non-volatile content addressable memory array has a differential non-volatile content addressable memory cell which uses a pair of non-volatile storage elements. Each of the non-volatile storage elements can be a split-gate floating gate transistor or a stack gate floating gate transistor having a first terminal, a second terminal, a channel therebetween and a floating gate over at least a portion of the channel to control the conduction of electrons in the channel, and a control gate. The floating gate storage transistor can be in one of two states: erased in which current can flow between the first terminal and the second terminal, and programmed in which substantially no current flows between the first terminal and the second terminal. A word line connects to the control terminal of the pair of non-volatile floating gate transistors. A pair of differential data lines connects to the first terminals of each of the pair of non-volatile floating gate transistors. Finally, a match line connects to the second terminal of each of the pair of non-volatile floating gate transistors.

Claims10

Dependent claims

A differential non-volatile content addressable memory cell comprising:

a pair of non-volatile storage elements, each having a first terminal, a second terminal, and a control terminal for controlling the flow of current between the first terminal and the second terminal;
wherein each of said storage elements is characterized by capable of being in one of two non-volatile states:
a first state in which a first current flows between said first terminal and said second terminal, and a second state in which a second current, less than said first current, flows between said first terminal and said second terminal;
a pair of differential data lines, each for connecting to the first terminal of one of said pair of non-volatile storage elements;
a match line connecting to the second terminals of each of said pair of non-volatile storage elements;
and
a word line connecting to the control terminals of each of said pair of non-volatile storage elements.

4 more elements

A differential non-volatile content addressable memory array comprising:

a plurality of non-volatile content addressable memory cells arranged in a plurality of rows and columns;
each non-volatile content addressable memory cell comprising a pair of non-volatile storage elements, each having a first terminal, a second terminal, and a control terminal for controlling the flow of current between the first terminal and the second terminal;
wherein each of said storage elements is characterized by capable of being in one of two non-volatile states:
a first state in which a first current flows between said first terminal and said second terminal, and a second state in which a second current, less than said first current, flows between said first terminal and said second terminal;
a word line in each row for connecting to the control terminals of the non-volatile content addressable memory cells in said row;
a pair of differential data lines in each column, each for connecting to the first terminal of one of said pair of non-volatile storage elements in each memory cell of said column;
and
a match line in each row for connecting to the second terminals of the non-volatile content addressable memory cells in said row.

5 more elements

Dependencies are inferred from the claim text.

Differential non-volatile content addressable memory cell and array

Life of this patent

Differential non-volatile content addressable memory cell and array

Life of this patent

Abstract

Claims10