Current limiter

#The present invention relates to current limiting circuits and more particularly to current limiting circuits for DVD disk drives.

#In a disk, such as DVD or DVD-RAM, information is recorded in sector units. Each sector includes header information having a physical identification data (PID) area and a user data area. The header information may be recorded on the first sector of the track. Typically, the header information area is divided into peak header area and a bottom header area, and the user data area being divided into a land area and a groove area.

#In DVD-RAM disks, a track is formed spirally, and the track is shifted laterally at a predetermined reference point. The reference point usually becomes a starting point of the first sector.

#FIG. 1 illustrates a current limiting circuit;

#FIG. 2 illustrates a graph of the current voltage characteristics of the current limiting circuit;

#FIG. 3 illustrates a current limiting circuit of the present invention;

#Turning now to FIG. 3, FIG. 3 illustrates a transistor 300 connected to receive input signal, namely a voltage VS at the base of transistor. The collector of transistor 300 is connected to voltage VCC while the emitter of transistor 300 is connected to a constant current source 304. Connected to the emitter of transistor 300 is NFET 312. The drain of NFET 312 is connected to the emitter of transistor 300. The source of NFET 312 is connected to the output terminal 314. Additionally connected to the output terminal 314 is constant voltage source 310. The other end of constant voltage source 310 is connected to the gate of NFET 312. The constant voltage source 310 provides a constant voltage to the gate of NFET 312. NFET 312 operates at single point as a result of the constant voltage from constant voltage source 310 to allow a constant current to flow from source to drain of NFET 312. Additionally, capacitor 306 is connected to node 314 as well as constant current source 308 is connected to node 314. In operation, if voltage VS should increase, transistor 300 would be able to conduct more current from collector to emitter of transistor 300. Transistor 300 connects the input voltage VS to a current. However, this current would attempt to flow through the drain to source of NFET 312, but because the gate of NFET 312 is at a constant voltage, the biasing of NFET 312 will prevent additional current from flowing. Thus, the voltage output from terminal 314 remains constant.

#Turning now to FIG. 4, FIG. 4 illustrates a similar circuit. Transistor 400 is connected to receive the input voltage VS at the base of transistor 400. The collector of transistor 400 is connected to VCC while the emitter of transistor 400 is connected to constant current source 404. The other end of constant current source 404 is connected to ground. Additionally, the NFET 412 is connected such that a drain of NFET 412 is connected to the emitter of transistor 400 while the source of NFET 412 is connected to the capacitor 406 with the other end of capacitor 406 connected to ground. Additionally, the source of NFET 412 is connected to constant current source 408. The gate of PFET 420 is connected to the source of NFET 412. The source of PFET 420 is connected to constant current source 422 and to the gate of NEET 412. The above circuit arrangement keeps the gate of NFET 412 at a constant voltage and consequently similar to the circuit of FIG. 3, the NFET 412 prevents additional current from flowing from gate to source.

#Turning now to FIG. 5, for changes in voltage, it can be very clearly seen that the current remains constant. More particularly, current is essentially flat. A change in voltage VS results in little current change.