Digital-analog converter
AssigneeFujitsu Limited
InventorsAtsushi Matsuda, Tohru Mizutani
Life of this patent
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Abstract
First and second switches are connected at each node between adjacent resistors in a resistor row and at the end of the resistor row. A predetermined number of first switches are grouped together and short-circuited to obtain a plurality of first switch groups, and a predetermined number of second switches are grouped together and short-circuited to obtain a plurality of second switch groups. The first and second switch groups are connected to output terminals via output switches. The first and second switches are ON/OFF controlled such that only one switch in the first and second switch groups is connected to the resistance row.
Claims18
A digital-analog converter of an n-bit resistance-division type that has a resistor row including a series connected 2n resistors, where n is an even number, the digital-analog converter comprising:
- a first switch group including 2n switches, each switch having two terminals, wherein one terminal of one switch is connected to the end terminal of the resistor row and one terminal of each of the remaining switches is connected to each node between two adjacent resistors in the resistor row;
- a second switch group including 2n switches, each switch having two terminals, wherein one terminal of one switch is connected to the end terminal of the resistor row and one terminal of each of the remaining switches is connected to each node between two adjacent resistors in the resistor row;
- a first node group, comprising 2n/2 nodes, formed by short-circuiting 2n/2 of the terminals of the switches in the first switch group that have not been connected to the resistor row;
- a second node group, comprising 2n/2 nodes, formed by short-circuiting 2n/2 of the terminals of the switches in the second switch group that have not been connected to the resistor row;
- a first output terminal;
- a second output terminal;
- a first output switch that connects the nodes in the first node group to the first output terminal;
- a second output switch that connects the nodes in the second node group to the second output terminal;
- and
- a switch controller that controls ON/OFF of the switches in the first switch group and the second switch group based on an input code such that all the switches are OFF or only one switch is ON.
A digital-analog converter of an n-bit resistance-division type that has a resistor row including a series connected 2n resistors, where n is an odd number, the digital-analog converter comprising:
- a first switch group including 2n switches, each switch having two terminals, wherein one terminal of one switch is connected to the end terminal of the resistor row and one terminal of each of the remaining switches is connected to each node between two adjacent resistors in the resistor row;
- a second switch group including 2n switches, each switch having two terminals, wherein one terminal of one switch is connected to the end terminal of the resistor row and one terminal of each of the remaining switches is connected to each node between two adjacent resistors in the resistor row;
- a first node group, comprising 2(n−1)/2 nodes, formed by short-circuiting 2(n+1)/2 of the terminals of the switches in the first switch group that have not been connected to the resistor row;
- a second node group, comprising 2(n+1)/2 nodes, formed by short-circuiting 2(n−1)/2 of the terminals of the switches in the second switch group that have not been connected to the resistor row;
- a first output terminal;
- a second output terminal;
- and
- a switch controller that controls ON/OFF of the switches in the first switch group and the second switch group based on an input code such that all the switches are OFF or only one switch is ON.
A digital-analog converter of an n-bit resistance-division type that has a resistor row including a series connected 2n resistors, where n is an even number, the digital-analog converter comprising:
- a first switch group including 2n switches, wherein one switch is connected to the end terminal of the resistor row and the remaining switches are connected to each node between two adjacent resistors in the resistor row;
- a second switch group that consists of a plurality of switches connected between adjacent nodes, by having nodes that are not connected to the resistor row of the 2n switches that are included in the switch group disposed in a matrix shape of 2n/2×2n/2;
- a first output terminal to which nodes disposed corresponding to a first side of the outermost periphery among the node groups disposed in the matrix shape are connected via mutually independent switches;
- and
- a second output terminal to which nodes disposed corresponding to a second side of the outermost periphery among the node groups are connected via mutually independent switches, wherein
- the switches included in the second switch group are ON/OFF controlled according to input codes such that a route short-circuited by the first output terminal and a route short-circuited by the second output terminal are mutually insulated.
A digital-analog converter of an n-bit resistance-division type that has a resistor row including a series connected 2n resistors, where n is an odd number, the digital-analog converter comprising:
- a first switch group including 2n switches, wherein one switch is connected to the end terminal of the resistor row and the remaining switches are connected to each node between two adjacent resistors in the resistor row;
- a second switch group that consists of a plurality of switches connected between adjacent nodes, by having nodes that are not connected to the resistor row of the 2n switches that are included in the switch group disposed in a matrix shape of 2(n+1)/2×2(n−1)/2,
- a first output terminal to which nodes disposed corresponding to a first side of the outermost periphery among the node groups disposed in the matrix shape are connected via mutually independent switches;
- and
- a second output terminal to which nodes disposed corresponding to a second side of the outermost periphery among the node groups are connected via mutually independent switches, wherein
- the switches included in the second switch group are ON/OFF controlled according to a plurality of input codes such that a route short-circuited by the first output terminal and a route short-circuited by the second output terminal are mutually insulated.
Dependencies are inferred from the claim text.