Nested chopper delta-sigma modulator
AssigneeMacronix International Co., Ltd.
InventorsShen-Iuan Liu, Chien-Hung Kuo
Life of this patent
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AssigneeMacronix International Co., Ltd.
InventorsShen-Iuan Liu, Chien-Hung Kuo
Estimating the term…
A nested chopper circuit includes a first chopper section, which is coupled to input terminals and is controlled by a pair of non-overlapping clocks, and a second chopper section, which is coupled to the first chopper section and is controlled by a pair of chopper clocks. The pair of non-overlapping clocks is a multiple of the pair of chopper clocks, and the non-overlapping clocks are configured to invert on a period continuously. When the pair of chopper clocks (φ11 and φ12) controls switches S1, S2, S3, and S4 of the second section, these switches follow the following logic when operated in conjunction with the pair of non-overlapping clocks (φA and φB): switches S1 & S4: φA·φ11+φB·φ12; and switches S2 & S3: φA·φ12+φB·φ11. A method for chopping an analog input signal for sampling also is described.
A nested chopper circuit, comprising:
A nested chopper circuit, comprising:
A method for chopping an analog input signal for sampling, comprising:
Dependencies are inferred from the claim text.