PLL circuit
AssigneeTexas Instruments Incorporated
InventorKouzou Ichimaru
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AssigneeTexas Instruments Incorporated
InventorKouzou Ichimaru
Estimating the term…
A circuit for removing a spurious component contained in the output signal in the locked state of a PLL circuit in a fractional frequency division system. For frequency synthesizer 1 in this invention, there is a period in which the current sunk by charge pump circuit 35 and the current output from it are different from each other, and the ON start time of the upper operation transistor on the source side is different from that of the lower operation transistor on the sink side. Consequently, the output signal of charge pump circuit 35 is free of the error component generated in the prior art due to that fact that the ON start times of the upper operation transistor and lower operation transistor are close to each other and the operation transistor that turns ON earlier affects the other operation transistor. Consequently, when a compensating current from compensating circuit 37 is superimposed on the output signal, it is possible to eliminate the ripple current completely.
A PLL circuit comprising
Dependencies are inferred from the claim text.