Integrated circuit comprising at least two clock systems

An integrated circuit, comprising:

• at least two clock systems in which a clock signal, starting from a clock input, is forwarded through clock trees to individual switching elements or switching blocks;
• at least one controlled switch which, for selected operating states, applies a common clock signal to the at least two clock trees, wherein at least a first clock tree has a phase locked loop unit connected upstream, and an output of the first clock tree is connected to an input of the phase locked loop unit and forms a phase locked loop, wherein each clock tree has an associated controlled switch, the switches actuated in the selected operating states such that the common clock signal is supplied to a last clock tree, and an output of the last clock tree is connected to another input of the phase locked loop unit for the first clock tree;
• and
• a delay module, whose delay corresponds to the at least one controlled switch, is connected between the output of the at least first clock tree and one input of the phase locked loop unit.