Process and temperature compensation circuit for integrated RF switching

An electronic driver circuitry for an integrated RF switching diode, comprising:

• a CMOS integrated circuit diode for RF switching;
• a second CMOS integrated circuit diode electrically connected to said first CMOS integrated circuit diode to compensate for process and temperature variations by supplying an equal yet opposite current for canceling out variations in said first CMOS integrated circuit diode;
• a first PMOS transistor and a first poly-resistor circuit electrically connected to and for switching ON/OFF said CMOS integrated circuit diode, said first PMOS transistor having an equal current as said CMOS integrated circuit diode;
• a second poly-resistor in electrically connected with said first poly-resistor for compensating variations in resistance;
• a plurality of cascaded PMOS transistors in circuit connection with said first PMOS transistor for compensating variations in gain and voltage threshold of said CMOS integrated circuit diode;
• and
• a plurality of cascaded NMOS transistors in circuit connection with said plurality of PMOS transistors for compensating for variations in supply voltage, wherein said resistance compensation is due to a connection of a second PMOS transistor to a third PMOS transistor, said second PMOS transistor and said third PMOS transistor connected such that current in said second PMOS transistor follows the current in said third PMOS transistor and said third transistor is connected to said second poly-resistor through a fourth NMOS transistor whereby all compensation cancels out undesired variations keeping current across the CMOS integrated circuit diode constant.

An electronic driver circuitry for an integrated RF switching diode, comprising:

• a CMOS integrated circuit diode for RF switching;
• a second CMOS integrated circuit diode electrically connected to said first CMOS integrated circuit diode to compensate for process and temperature variations by supplying an equal yet opposite current for canceling out variations in said first CMOS integrated circuit diode;
• a first PMOS transistor and a first poly-resistor circuit electrically connected to and for switching ON/OFF said CMOS integrated circuit diode, said first PMOS transistor having an equal current as said CMOS integrated circuit diode;
• a second poly-resistor in electrically connected with said first poly-resistor for compensating variations in resistance;
• a plurality of cascaded PMOS transistors in circuit connection with said first PMOS transistor for compensating variations in gain and voltage threshold of said CMOS integrated circuit diode;
• and
• a plurality of cascaded NMOS transistors in circuit connection with said plurality of PMOS transistors for compensating for variations in supply voltage, wherein said resistance compensation is due to a connection of a second PMOS transistor to a third PMOS transistor, said second PMOS transistor and said third PMOS transistor connected such that current in said second PMOS transistor follows the current in said third PMOS transistor and said third transistor is connected to said second poly-resistor through a fourth NMOS transistor wherein a change of resistance value of said second resistance causes an opposite change of current in said third PMOS transistor with said current in said second PMOS transistor having like current thereby compensating for an increase in resistance of first poly-resistor wherein source voltage and current of said first PMOS transistor is held constant said current across the CMOS integrated circuit diode constant whereby all compensation cancels out undesired variations keeping current across the CMOS integrated circuit diode constant.