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US 6,639,397 B2Granted
Automatic test equipment for testing a device under test
AssigneeAgilent Technologies, Inc.
InventorsBernhard Roth, Henriette Ossoinig
Life of this patent
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AssigneeAgilent Technologies, Inc.
InventorsBernhard Roth, Henriette Ossoinig
Estimating the term…
An electronic circuit for automatic test equipment for testing a device under test includes two lines for connecting the circuit with a device under test. Two comparators are provided, one input of each of the comparators being connected to different ones of the two lines. A further comparator is provided, the two inputs of the further comparator being connected to different ones of the two lines. Each of the two lines is terminated. Switching elements are provided which are connected between the two lines. The switching elements enable the circuit to be used in different modes, in particular with a single-ended termination and with a differential termination.
An electronic circuit for automatic test equipment for testing a device under test, comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Stimuli generation or application of test patterns to the device under test [DUT]: voltage or current aspects, e.g. driver, receiver
Tester hardware, i.e. output processing circuits: with comparison between actual response and known fault free response
Measuring electric variables
Term ended 8 Nov 2021 (estimated)
1. Field of the Invention
The invention relates to an electronic circuit for automatic test equipment for testing a device under test.
2. Discussion of the Background Art
FIG. 1 shows a first embodiment of an electronic circuit for an automatic test equipment according to the invention;
FIG. 2 shows a second embodiment of an electronic circuit according to the invention; and
FIG. 3 shows a third embodiment of an electronic circuit according to the invention.
In FIG. 1, a first embodiment of a pin-electronic circuit 10 for an automatic test equipment according to the invention is shown.
A signal SIG_A from a device under test is received by the circuit 10 on a line 11 and a signal SIG_B from the same device under test is received by the circuit 10 on a line 12. One input of a comparator CS1 is connected to the line 11 and one input of a comparator CS2 is connected to the line 12. The respective other inputs of the comparators CS1, CS2 receive a voltage VTH1, VTH2. The two inputs of another comparator CD are connected to the two lines 11, 12.
Each of the two lines 11, 12 are also connected to a resistor R1, R2 which both have the impedance Z of each of the transmission lines from the device under test to the circuit 10. The other sides of two resistors R1, R2 are then connected together via a switch SW.