Balanced coefficient of thermal expansion for flip chip ball grid array
AssigneeLSI Logic Corporation
InventorsKumar Nagarajan, Zafer Kutlu, Shirish Shah
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Abstract
A flip chip ball grid array package includes a thin die having a die thickness reduced from a wafer thickness to reduce mismatch of a coefficient of thermal expansion between the thin die and a substrate; a plurality of thin film layers formed on the thin die wherein each of the plurality of thin film layers has a coefficient of thermal expansion that is greater than that of the thin die and is less than that of the substrate; and a plurality of wafer bumps formed on the thin die for making electrical contact between the thin die and the substrate.
Claims6
A flip chip ball grid array package comprising:
- a thin die having a die thickness reduced from a wafer thickness wherein the die thickness is selected to reduce mismatch of a coefficient of thermal expansion of the thin die to that of a substrate;
- a plurality of thin film layers formed on the thin die wherein each of the plurality of thin film layers has a coefficient of thermal expansion that is greater than that of the thin die and is less than that of the substrate;
- a plurality of wafer bumps formed on the thin die for making electrical contact between the thin die and the substrate;
- wherein the plurality of thin film layers comprise a first, a second, and a third thin film layer having successively graduated coefficients of thermal expansion from about 7-10 parts per million per degree Kelvin for the first thin film layer, 10-14 parts per million per degree Kelvin for the second thin film layer, and 15-19 parts-per million per degree Kelvin for the third thin film layer.
Dependencies are inferred from the claim text.