Silicon carbide n channel MOS semiconductor device and method for manufacturing the same

A silicon carbide n channel MOS semiconductor device comprising:

• a semiconductor substrate comprising silicon carbide, said substrate including a p base region, an n+ source region and an n+ drain region;
• a gate insulating film formed on a surface of the p base region;
• a gate electrode provided on the gate insulating film;
• and
• first and second main electrodes that allow current to flow therebetween;
• wherein current flowing between the first and second main electrodes is controlled by controlling an electron concentration of an inversion layer that is induced in a surface layer of the p base region located under the gate insulating film when a positive voltage is applied to the gate electrode;
• and
• wherein a total amount x per unit area of donor impurities introduced into a surface layer of the p base region is in a range represented by:
• 1×1011 cm−2<x<5QB/q,
• QB=(4∈o ∈s ΦBNA)½
• where ∈o is a dielectric constant in vacuum, ∈s is a dielectric constant of silicon carbide, ΦB is an energy difference between an intrinsic Fermi level and a Fermi level of silicon carbide, NA is an acceptor concentration of the p base region before implantation of donor ions, and q is an intrinsic charge.