High performance packaging platform and method of making same

A packaging platform, comprising:

• a compensator layer;
• a first inner dielectric layer laminated to one side of the compensator layer;
• a second inner dielectric layer laminated to the opposite side of the compensator layer;
• a first ground or power plane disposed on the outer side of the first inner dielectric layer;
• a second ground or power plane disposed on the outer side of the second inner dielectric layer;
• a first intermediate dielectric layer disposed on said first ground or power plane;
• a second intermediate dielectric layer disposed on the second ground or power plane;
• a first fluoropolymer barrier layer formed on the first intermediate dielectric layer;
• a second fluoropolymer barrier layer formed on the second intermediate dielectric layer;
• a through hole extending between outer surfaces of said first and second fluoropolymer barrier layers;
• a conductive material coating said through hole;
• and
• clearances between said conductive material and said compensator layer proximate to said through hole;
• wherein said first and second fluoropolymer barrier layers are devoid of ceramic components, and said first and second intermediate dielectric layers comprise ceramic containing fluoropolymers.

A circuitized structure, comprising:

• a) a circuitized substrate;
• b) a platform carrier, electrically and mechanically connected to the substrate, comprising:
• a laminate having opposite outer surfaces and including at least one ceramic containing dielectric layer disposed and covering one of said opposite outer surfaces, said surfaces further comprising fine line circuitry and at least one outer most impermeable protective flouropolymer barrier layer devoid of ceramic material wherein said outer most impermeable barrier layer covers said at least one ceramic-containing dielectric layer and is impermeable to process chemicals encountered during fabrication of said circuitized structure and permits metallized ceramic line processes without degradation of said circuitized structure;
• at least one through hole extending between opposite outer surfaces of said laminate;
• a conductive material coating said at least one through hole;
• and
• c) a chip, disposed on the carrier and electrically and mechanically connected to said fine line circuitry.

A packaging platform useful for interconnecting integrated circuit chips and cards, in which the platform comprises:

• a circuitized laminate having opposite outer surfaces;
• at least one ceramic-containing dielectric layer disposed on at least one of the opposite outer surfaces of said circuitized laminate;
• at least one outermost protective impermeable fluoropolymer barrier layer devoid of ceramic material disposed on and covering said at least one ceramic containing dielectric layer, said outermost protective impermeable fluoropolymer barrier layer being impermeable to process chemicals encountered during fabrication of said packaging platform for said integrated circuit chip and permitting metallized ceramic line processes without degradation of said integrated circuit chip;
• a compensator layer disposed on and partially covering another of said at least one ceramic-containing dielectric layer, said another of said at least one ceramic-containing dielectric layer opposing said at least one outermost protective impermeable fluoropolymer barrier layer;
• at least one through hole extending between opposite outer surfaces of said laminate;
• a conductive material coating said at least one through hole;
• and
• clearances between said conductive material and said compensator layer proximate to at least one of said through holes, said clearances isolating said conductive material from said compensator layer.