Method for fabricating a high-density capacitor
AssigneeUnited Microelectronics Corp.
InventorsTeng-Chun Tsai, Chia-Lin Hsu, Yi-Fang Cheng
Life of this patent
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Abstract
A method of fabricating a high-density capacitor. At least one first trench is formed in a dielectric layer positioned on a semiconductor substrate. A first liner layer and a first conductive layer are formed on the semiconductor substrate followed by a first planarization process. At least one second trench having a joint side wall with the first trench is formed in the dielectric layer. A capacitor dielectric layer, a second liner layer, and a second conductive layer are formed on the semiconductor substrate followed by a second planarization process. The surfaces of the first conductive layer and the second conductive layer are then exposed to form a high-density capacitor having a three-dimensional structure.
Claims20
A method for fabricating a high-density capacitor in a semiconductor substrate that comprises a dielectric layer, the method comprising:
- forming at least one first trench in the dielectric layer;
- forming a first liner layer on the semiconductor substrate and a first conductive layer on the first liner layer that fills the first trench;
- removing portions of the first conductive layer and the first liner layer to planarize the surface of the semiconductor substrate;
- forming at least one second trench having a joint side wall with the first trench in the dielectric layer;
- forming a capacitor dielectric layer on the semiconductor substrate;
- forming a second liner layer on the semiconductor substrate and a second conductive layer on the second liner layer that fills the second trench;
- removing portions of the second conductive layer and the second liner layer to planarize the surface of the semiconductor substrate;
- and
- removing portions of the capacitor dielectric layer to expose the surfaces of the first conductive layer and the second conductive layer, so that the first conductive layer, the capacitor dielectric layer and the second conductive layer constitute the high-density capacitor having a vertical three-dimensional (3-D) structure.
A method for fabricating a high-density capacitor in a semiconductor substrate that comprises a dielectric layer, the method comprising:
- forming at least one first trench and an interconnection structure in the dielectric layer simultaneously;
- forming a first liner layer on the semiconductor substrate and a first conductive layer on the first liner layer that fills the first trench and the interconnection structure;
- removing portions of the first conductive layer and the first liner layer to planarize the surface of the semiconductor substrate;
- forming at least one second trench having a joint side wall with the first trench in the dielectric layer;
- forming a capacitor dielectric layer on the semiconductor substrate;
- forming a second liner layer on the semiconductor substrate and a second conductive layer on the second liner layer that fills the second trench;
- removing portions of the second conductive layer and the second liner layer to planarize the surface of the semiconductor substrate;
- and
- removing portions of the capacitor dielectric layer to expose the surfaces of the first conductive layer and the second conductive layer, so that the first conductive layer, the capacitor dielectric layer, and the second conductive layer constitute the high-density capacitor having a vertical three-dimensional structure.
Dependencies are inferred from the claim text.