Method for forming the self-aligned buried N+ type to diffusion process in ETOX flash cell
AssigneeUnited Microelectronics Corp.
InventorCheng-Jyi Chang
Life of this patent
Estimating the term…
Abstract
A method for forming the self-aligned buried N+-type to diffusion process in ETOX flash cell is disclosed. The method at least includes the following steps. First of all, a substrate is provided having a pad oxide layer thereon, a dielectric layer on the pad oxide layer, and a cap layer on the dielectric layer. Then, a portion of the cap layer and the dielectric layer are etched to stop on the pad oxide layer to define an active region. Then, a spacer is formed on sidewall of the dielectric layer. Next, a portion of the pad oxide layer and the substrate are etched through said buried N+-type region to form an opening in the substrate. Finally, a field oxide region is formed in the substrate.
Claims17
A method for forming a self-aligned buried N+ type region in a substrate, said method comprising:
- providing a substrate having a pad oxide layer thereon, a dielectric layer on said pad oxide layer, and a cap layer on said dielectric layer;
- etching a portion of said cap layer and said dielectric layer to stop on said pad oxide layer to define an active region;
- forming a spacer on sidewall of said dielectric layer;
- etching a portion of said pad oxide layer and said substrate through said buried N+ type region to form a opening in said substrate;
- and
- forming a field oxide region in said substrate.
A method for forming a non-volatile memory array, said method comprising:
- providing a substrate having a pad oxide layer thereon, a dielectric layer on said pad oxide layer, and a cap layer on said dielectric layer;
- anisotropically etching a portion of said cap layer and said dielectric layer to stop on said pad oxide layer to define an active region;
- forming a spacer on sidewall of said dielectric layer;
- etching a portion of said pad oxide layer and said substrate through said buried N+-type region to form a opening in said substrate;
- forming a field oxide region in said substrate;
- forming a floating gate between on said field oxide region and said active region;
- forming a conformal interpoly dielectric layer over said floating gate and said field oxide region;
- and depositing a polysilicon layer over said conformal interpoly dielectric layer as a control gate to form a gate structure of flash cell array.
A method for forming the self-aligned buried N+-type to diffusion process in electron tunnel oxide (ETOX) flash cell, said method comprising:
- providing a substrate;
- forming a pad oxide layer on said substrate;
- forming a dielectric layer on said pad oxide layer;
- forming a cap layer on said dielectric layer;
- anisotropically etching a portion of said cap layer and said dielectric layer to stop on said pad oxide layer to define an active region;
- forming a oxide spacer on sidewall of said dielectric layer;
- anisotropically etching a portion of said pad oxide layer and said substrate to form a opening in said substrate;
- forming a field oxide region in said substrate;
- forming a floating gate between on said field oxide region and said active region;
- forming a conformal interpoly dielectric layer over said floating gate and said field oxide region;
- and
- depositing a polysilicon layer over said conformal interpoly dielectric layer as a control gate to form a gate structure of flash cell array.
Dependencies are inferred from the claim text.