Method of manufacturing semiconductor device with high and low breakdown transistors
AssigneeSeiko Epson Corporation
InventorsAtsushi Kanda, Yasushi Haga
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AssigneeSeiko Epson Corporation
InventorsAtsushi Kanda, Yasushi Haga
Estimating the term…
Among first and second oxide films 110 and 112 formed on a substrate 100, the oxide film in a low-breakdown-voltage transistor area LV is all etched off, while the whole surface of the oxide film in a high-breakdown-voltage transistor area HV is left intact. A sixth oxide film 119 to define a side wall is subsequently formed on the whole surface of the substrate 100, and a resist R17 is formed over the whole high-breakdown-voltage transistor area HV. Over-etching of the low-breakdown-voltage transistor area LV is carried out to make the surface of the substrate 100 exposed and to define the side wall only in the low-breakdown-voltage transistor area LV. The oxide film 119 is made to remain in the high-breakdown-voltage transistor area HV. Non-required portions of the oxide films 119 and 112 are then etched off with a resist R15B. This causes a drain-source forming region, which is expected to form a drain area and a source area, to be open in an element forming region in a high-breakdown-voltage nMOS area HVn. The resist R15B is not removed but is used continuously, and an n-type impurity ion is implanted into the open drain-source forming region. This arrangement enables both a high-breakdown-voltage MOS transistor and a low-breakdown-voltage MOS transistor to be formed efficiently on an identical substrate without damaging the characteristics of the respective MOS transistors.
A method of manufacturing a semiconductor device, in which both a high-breakdown-voltage MOS transistor and a low-breakdown-voltage MOS transistor having different drain breakdown voltages are formed on an identical semiconductor substrate, the manufacturing method comprising the steps of:
Dependencies are inferred from the claim text.