Turbo code interleaver using linear congruential sequences

A wireless apparatus configured for turbo coding, comprising:

• a first coder configured to receive a plurality of input bits in succession and generate a first plurality of output symbols therefrom;
• an interleaver configured to receive the plurality of input bits in succession, the interleaver including a plurality of bit storage locations arranged in a matrix of rows and columns and a linear congruential sequence generator configured to pseudo-random generate a sequence for shuffling bits within each row of the interleaver;
• and
• a second coder configured to receive a plurality of interleaved bits in succession from the interleaver and generate a second plurality of output symbols therefrom,
• wherein the first and second coders are configured to iteratively decode the plurality of input bits.

A method for turbo decoding, comprising:

• decoding a plurality of input bits in succession to generate a first plurality of output symbols therefrom;
• interleaving the first plurality of output symbols in succession, the interleaving comprising:
• generating a linear congruential sequence value for at least a portion of the plurality of input bits, each of the linear congruential sequence values identifying a first parameter for the plurality of input bits;
• and
• generating a second plurality of output symbols as a function of the linear congruential sequence values;
• and
• decoding the second plurality of output symbols.

An apparatus for turbo decoding, comprising:

• means for decoding a plurality of input bits in succession to generate a first plurality of output symbols therefrom;
• means for interleaving the first plurality of output symbols in succession, the means for interleaving comprising:
• means for generating a linear congruential sequence value for at least a portion of the plurality of input bits, each of the linear congruential sequence values identifying a first parameter for the plurality of input bits;
• and
• means for generating a second plurality of output symbols as a function of the linear congruential sequence values;
• and
• means for decoding the second plurality of output symbols.

A wireless apparatus configured for turbo coding, comprising:

• a memory storage unit including a plurality of bit storage locations arranged in a matrix of rows and columns;
• and
• a processor configured to:
• receive a plurality of input bits in succession and generate a first plurality of output symbols therefrom, the first plurality of output symbols stored in the matrix of the memory storage unit;
• pseudo-random generate a sequence for shuffling bits within each row of the matrix;
• and
• receive the shuffled bits and generate a second plurality of output symbols therefrom.