Data storage system having crossbar switch with multi-staged routing

A memory system, comprising:

• a backplane having a plurality of receiving slots, each one of the slots having electrical contacts for providing an indication of such one of the slots, each one of the slots having a different slot indication;
• a plurality of memory boards, each one being plugged into a corresponding one of the slots, each one of such boards being coupled to the electrical contacts in the corresponding one of the slots to provide a slot signal indicative of the slot indication provided by the electrical contacts;
• each one of such boards having:
• (A) a plurality of memory array regions, each one of such regions having a common DATA port and a pair of independent memory array control ports;
• (B) a plurality of logic sections, each one of the logic sections having:
• a first logic section upper ports, a second logic section upper ports, a logic section control port, and a logic section DATA port;
• (C) a plurality of crossbar switches, each one thereof having a plurality of crossbar switch upper ports and a plurality of crossbar switch lower ports, such crossbar switch upper ports and crossbar switch lower ports being coupled in accordance with information fed to the crossbar switch upper ports, such lower ports being coupled to the first and second upper ports of the plurality of logic sections, for transferring information between a selected one of the upper ports of the crossbar switches and the control logic sections to one of the memory array regions coupled thereto, such transfer being initiated by a director coupled to such selected one of the upper ports, such director designating a selected one of the plurality of memory boards, such director providing to the switching network a “tag” indicating such designated one of one of the plurality of memory boards having the memory involved in the requested transfer, such crossbar switches having:
• a memory board checker, for comparing the slot signal with the “tag” for indicating(whether the memory board receiving the “tag” is the director designated one of the plurality of memory boards.