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US 6,636,932 B1Granted
Crossbar switch and control for data networks switching
AssigneeMicron Technology, Inc.
InventorsZvi Regev, Alon Regev
Life of this patent
Estimating the term…
Abstract
A modified version of a switching/routing device commonly known as a crossbar switch which is optimized to switch and reroute very high speed synchronous data communication signals without interruptions and/or excessive transition time shifts.
Claims9
A programmable digital signal routing apparatus comprising:
- a programmable switching matrix configured to route any of a set of P inputs to any of a set of Q outputs;
- a set of flip-flops corresponding to each of said Q outputs;
- a master clock coupled to said set of flip-flops to synchronously provide a synchronous
- clock signal to each of said flip-flops;
- and
- a set of variable delay circuits corresponding to, and disposed in front of each of a corresponding one of said flip-flops, each one of said variable delay circuits including two sections wherein
- a first section controls first delay increments to synchronize data signal transitions to the master clock, and
- a second section provides second programmable delay increments to synchronize the data input to said routing apparatus.
5 more elements
A programmable digital signal routing apparatus comprising:
- a programmable switching matrix configured to route any of a set of P inputs to any of a set of Q outputs;
- a set of flip-flops corresponding to each of said Q outputs;
- a set of variable delay circuits corresponding to, and disposed in front of each of a corresponding one of said flip-flops;
- and
- a master clock coupled to said set of flip-flops to synchronously provide a synchronous clock signal to each of said flip-flops;
- wherein for each of said Q outputs, the variable delay circuit is disposed between the programmable switching matrix and the flip-flops.
3 more elements
A programmable digital signal routing apparatus comprising:
- a programmable switching matrix configured to route any of a set of P inputs to any of a set of Q outputs;
- a set of flip-flops corresponding to each of said Q outputs;
- and
- a master clock coupled to said set of flip-flops to synchronously provide a synchronous clock signal to each of said flip-flops;
- wherein at least two routing operations are executed simultaneously in a make before break fashion such that signal flow to the outputs of the apparatus is not interrupted “executing said routing operations;
- and wherein for each of the Q outputs, a variable delay circuit is disposed between the programmable switching matrix and a respective one of the flip-flops.”
3 more elements
Dependencies are inferred from the claim text.