Write posting with global ordering in multi-path systems
AssigneeHewlett-Packard Development Company, L.P.
InventorRobert J Brooks
Life of this patent
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Abstract
An apparatus and method for permitting write posting with global ordering in a multipath system. The apparatus and method including a bus adapter having an input port to receive one or more operations from a processor. A queue controlled by the bus adapter buffers information from the one or more operations. A control circuit, coupled to the queue, generates an output signal that relates to the information from the one or more operations. The output signal is transmitted to the processor. An interconnect fabric, coupled to each bus adapter, transmits the one or more operations. A device, connected to the interconnect fabric, receives the transmitted operations, where the device sends a acknowledgment signal to the processor upon receiving the transmitted operation.
Claims29
An apparatus for write posting in multiprocessor systems, the apparatus comprising:
- (a) a bus adapter having an input port to receive one or more operations from a processor;
- (b) a queue to buffer information from the one or more operations, wherein the queue is controlled by the bus adapter;
- and
- (c) a control circuit, coupled to the queue, to generate an output signal to be transmitted to the processor, wherein the output signal relates to execution of the one or more operations, wherein the posted write operation comprises both an ordering commit point and a sequentiality commit point and wherein the sequentiality commit point is a point at which it is known the operation will not be retried.
An apparatus for write posting, the apparatus comprising:
- (a) multiple processors, wherein each processor is coupled to a bus adapter to send one or more operations to the bus adaptor;
- (b) a queue, coupled to the bus adapter, to generate an output signal relating to the one or more operations, wherein the output signal relates to information from the one or more operations;
- (c) an interconnect fabric, coupled to each bus adapter, to transmit the one or more operations;
- and
- (d) a device, connected to the interconnect fabric, to receive the transmitted operations, wherein a transmitted write operation comprises both an ordering commit point and a sequentiality commit point and wherein the sequentiality commit point is a point at which it is known the operation will not be retried.
A method for write posting in a multiprocessor system, the method comprising the steps of:
- (a) sending one or more operations by a processor;
- (b) receiving information in a queue from the one or more operations;
- (c) executing the information of the one or more operations;
- and
- (d) generating an output signal relating to the step of executing the information, wherein the output signal has semantics where assertion of the output signal signifies a sequentiality commit point, the sequentiality commit point being potentially distinct from an ordering commit point later in the operation and wherein the sequentiality commit point is a point at which it is known the operation will not be retried.
An apparatus for write posting in multiprocessor systems, the apparatus comprising:
- (a) a bus adapter having an input port to receive one or more operations from a processor;
- (b) a queue to buffer information from the one or more operations, wherein the queue is controlled by the bus adapter;
- (c) a control circuit, coupled to the queue, to generate an output signal to be transmitted to the processor, wherein the output signal relates to execution of the one or more operations;
- and
- (d) an output signal having semantics where assertion of the output signal signifies a sequentiality commit point, the sequentiality commit point being potentially distinct from an ordering commit point later in the operation and wherein the sequentiality commit point is a point at which it is known the operation will not be retried.
A system of multiple producers of posted writes to a single consumer, comprising:
- (a) at least two processors producing posted writes;
- (b) a plurality of write posting apparatuses, wherein each unique write posting apparatus is connected to one of the at least two processors, wherein the write posting apparatus comprises:
- a bus adapter having an input port to receive one or more operations from a processor;
- a queue to buffer information from the one or more operations, wherein the queue is controlled by the bus adapter;
- a control circuit, coupled to the queue, to generate an output signal to be transmitted to the processor, wherein the output signal relates to execution of the one or more operations;
- and
- an output signal having semantics where assertion of the output signal signifies a sequentiality commit point, the sequentiality commit point being potentially distinct from an ordering commit point later in the operation and wherein the sequentiality commit point is a point at which it is known the operation will not be retried;
- and
- (c) an interconnect fabric connecting each instance of the plurality of write posting apparatuses, wherein the interconnect fabric also connects to a destination device, and wherein paths from each processor to the destination device differ.
A method for posted writes in a multiple path multiprocessor system, the method comprising the steps of:
- posting, by a first processor, one or more writes to a destination device;
- posting, by a second processor, one or more writes to the destination device, wherein the second processor is programmed such that the one or more writes of the second processor reach the destination device after the writes posted by the first processor;
- executing, by the first processor, an ordered operation after transmitting a last in sequence of the one or more writes;
- stalling the ordered operation until ordering of commit points for each previously issued operation of the first processor have occurred;
- and
- proceeding, by the second processor, with the one or more writes to the destination device.
Dependencies are inferred from the claim text.