Component level, CPU-testable, multi-chip package using grid arrays

A method for testing a computer system, the method comprising:

• providing a plurality of N associated computer components, numbered 1, . . . , N, with N a selected integer that is at least 2;
• providing a plurality of at least N+1 electrical sub-system tests, numbered n=0, 1, 2, . . . , N, and initializing the count index n to n=0, where, for at least one sub-system, numbered n′ (0≦n′≦N−1), sub-system test number n′ must be performed before at least one sub-system test number n″, with n″>n′;
• electrically connecting a selected microprocessor and an integrated semiconductor substrate together to form a sub-system number 0 and performing the sub-system number 0 test on the sub-system number 0;
• (A) when sub-system number n passes the sub-system number n test, incrementing n by 1, electrically connecting sub-system number n−1 and the computer component number n to form a subsystem number n, and performing at least one sub-system number n test on the sub-system number n;
• (B) when the sub-system number n fails to pass the at least one sub-system number n test, indicating that the sub-system number n has failed;
• (C) when the sub-system number n passes the at least one sub-system number n test, determining whether the integer n satisfies n≧N;
• (D) when the integer n does not satisfy n≧N, repeating steps (A), (B) and (C) at least once;
• and
• (E) for at least one integer value of the count index, n=n′″, satisfying ( )≦n′″≦N−1:
• receiving at least one sub-system, number n′″, that has failed to pass the sub-system number n′″ test;
• examining the received sub-system number n′″ and identifying at least one defect that caused the received sub-system number n′″ to fail the sub-system number n′″ test, before performing the sub-system number n′″+1 test;
• and
• modifying the received sub-system number n′″ to remove the at least one defect that is identified in the sub-system number n′″.