Phase locked loop system

In combination with a receiver having a reception frequency and being configured for receiving digitally modulated received signals and analog-modulated received signals, a phase locked loop system, comprising:

• at least one voltage controlled oscillator for producing an oscillator signal having an oscillator signal frequency, the oscillator signal being provided for tuning the reception frequency;
• a first frequency divider, coupled to said at least one voltage controlled oscillator, for dividing the oscillator signal frequency to a nominal comparison frequency as a function of a receiving channel selection signal;
• a reference oscillator for generating a reference oscillator signal having a given reference frequency;
• a second frequency divider, coupled to said reference oscillator, for dividing the given reference frequency as a function of a reception mode switching signal;
• a phase comparison circuit, coupled to said first frequency divider and to said second frequency divider, for comparing signals supplied by said first frequency divider and said second frequency divider in order to produce a tuning voltage for said at least one voltage-controlled oscillator, said phase comparison circuit having an adjustable gain for optimizing a phase noise;
• a multiplication device, coupled to said at least one voltage controlled oscillator, for multiplying a received signal by the oscillator signal in order to produce an intermediate frequency signal;
• and
• a detection circuit provided downstream from said multiplication device, said detection circuit detecting the phase noise on the intermediate frequency signal and generating a control signal, the adjustable gain of said phase comparison circuit being adjustable as a function of the control signal.