US 6,636,507 B1 · Frame data exchanging method and apparatus

Abstract

A frame switching apparatus in which it is possible to suppress the operating frequency of the bus and to suppress the cell loss ratio in comparison with that of an ATM cell switching apparatus employing the conventional input buffer system. Since the small capacity buffer Bn-n furnishes a transient storage site for a cell C, a distribution circuit 3n is able to receive a new cell Cn from the input buffer 2n to process the received cell. Therefore, head-of-line blocking is less likely to take place. On the other hand, since the small capacity buffer transfers the cell to only one output port, it is sufficient if the switching matrix SWM is of a N:1 multiplexer structure which is far simpler than a complete cross-bandwidth available register structure.

Claims6

Dependent claims

An apparatus for switching frame data in which data is switched in terms of a pre-set number of frames as a unit, comprising:

input buffer means for storing frame data arriving at an input port from an external data source;
distribution means for checking addresses of the frame data stored in said input buffer means and for distributing the frame data to respective output ports;
memory means connected to a downstream side of said distribution means in association with said output ports for temporarily storing the frame data distributed by said distribution means;
switching means for connecting said memory means to said output ports;
and
arbitration means for controlling said switching means.

3 more elements

Dependencies are inferred from the claim text.

Frame data exchanging method and apparatus

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Frame data exchanging method and apparatus

Life of this patent

Abstract

Claims6