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US 6,636,452 B2Granted
Address control apparatus of semiconductor memory device using bank address
AssigneeHynix Semiconductor Inc.
InventorYong Ki Kim
Life of this patent
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Abstract
An address control apparatus for a semiconductor memory device using a bank address, and more particularly an address control apparatus for a semiconductor memory device using a bank address being concurrently used as a row address in accordance with an architectural bank in realizing various dynamic random access memory (DRAM) macro sets more than 2M˜64M, utilizing a memory compiler in embedded-DRAM, resulting in reduced design time for the macro sets with a minimum of circuit elements.
Claims10
An address control apparatus for a semiconductor memory device using a bank address, the address control apparatus comprising:
- a row address buffer for buffering and generating a row address signal;
- a bank address buffer for buffering and generating a bank address signal;
- a bank control unit for activating a selected bank in response to the buffered bank address signal provided from the bank address buffer;
- an address control unit for converting the buffered bank address signal provided from the bank address buffer into an additional row address signal, and then generating the additional row address signal;
- and
- a row pre-decoder for pre-decoding the buffered row address signal provided from the row address buffer and the converted additional row address signal provided from the address control unit, and then generating a composite row address signal.
3 more elements
Dependencies are inferred from the claim text.