Fuse read sequence for auto refresh power reduction
AssigneeMicron Technology, Inc.
InventorGreg A. Blodgett
Life of this patent
Estimating the term…
Abstract
A fuse read sequence for a memory device is disclosed. The fuse read sequence obtains enhanced energy efficiency by selectively reading or strobing antifuse or fuse circuit banks of the memory device in response to operational commands of the memory device. More particularly, the column antifuse circuit banks of a SDRAM are read in response to a load mode register command and the row and option antifuse circuit banks are read in response to auto refresh commands. Furthermore, only half of the row/option antifuse circuit banks are read on each auto refresh command.
Claims21
A method of reading antifuses in a memory device comprising:
- reading a first set of antifuses in response to a first memory command;
- and
- reading a second set of antifuses in response to a second memory command.
A method of reading antifuses in a memory device comprising:
- reading a first set of antifuses in response to a first command, wherein said reading a first set of antifuses in response to a first command comprises reading a set of column antifuses in response to a load mode register command;
- and
- reading a second set of antifuses in response to a second command.
A method of reading antifuses in a memory device comprising:
- reading a first set of antifuses in response to a first command;
- and
- reading a second set of antifuses in response to a second command, wherein said reading a second set of antifuses in response to a second command comprises reading a set of row/option antifuses in response to an auto refresh command.
A method of reading antifuses in a memory device comprising:
- reading a first set of antifuses in response to a first command;
- reading a second set of antifuses in response to a second command, including
- reading a first half of said second set of antifuses in response to an auto refresh command;
- and
- reading a second half of said second set of antifuses in response to a second auto refresh command.
A method of reading antifuses in a memory device comprising:
- reading a first set of antifuses in response to a first command;
- and
- reading a second set of antifuses in response to a second command, wherein said reading a second set of antifuses in response to a second command comprises:
- reading a first row/option antifuse bank in response to an auto refresh command;
- and
- reading a second row/option antifuse bank in response to a second auto refresh command.
A method for reading antifuse circuits in a memory device comprising:
- generating a command signal;
- interpreting said command signal;
- generating a read signal in response to said command signal;
- applying said read signal to read a selected set of antifuse circuits in said memory device in response to said command signal;
- and
- terminating said read signal.
A method for reading antifuse circuits in a memory device comprising:
- generating a command signal, wherein said generating a command signal comprises
- generating an auto refresh command signal within said memory device;
- interpreting said command signal;
- generating a read signal in response to said command signal;
- applying said read signal to read selected antifuse circuits in said memory device;
- and
- terminating said read signal.
A method for reading antifuse circuits in a memory device comprising:
- generating a command signal, wherein said generating a command signal comprises generating a load mode register command signal within said memory device;
- interpreting said command signal;
- generating a read signal in response to said command signal;
- applying said read signal to read selected antifuse circuits in said memory device;
- and
- terminating said read signal.
A method for reading antifuse circuits in a memory device comprising:
- generating a command signal;
- interpreting said command signal, wherein said interpreting said command signal comprises differentiating between an auto refresh command and a load mode register command;
- generating a read signal in response to said command signal;
- applying said read signal to read selected antifuse circuits in said memory device;
- and
- terminating said read signal.
A method for reading antifuse circuits in a memory device comprising:
- generating a command signal;
- interpreting said command signal;
- generating a read signal in response to said command signal, wherein said generating a read signal in response to said command signal comprises:
- generating a column antifuse read signal if said command signal is a load mode register command;
- and
- generating a row antifuse read signal if said command signal is an auto refresh command;
- applying said read signal to read selected antifuse circuits in said memory device;
- and
- terminating said read signal.
A computer system comprising:
- a processor;
- a memory controller coupled to said processor;
- and
- a memory device coupled to said processor through said memory controller, said memory device configured for reading a first set of antifuses in response to a first memory command and a second set of antifuses in response to a second memory command.
Dependencies are inferred from the claim text.