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US 6,636,448 B2Granted
Semiconductor memory device having fewer memory cell plates being activated in a test mode than in a normal mode
AssigneesNEC Corporation, NEC Electronics Corporation
InventorYasuji Koshikawa
Life of this patent
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Abstract
A semiconductor memory device (10) having a normal mode of operation and a test mode of operation is provided. The semiconductor memory device (10) can include a plurality of banks (100A to 100D). A bank (100A) may have a plurality of plates (PLT). In the normal mode of operation a row of plates (11020, 11021, . . . 11027) may be activated. In the test mode of operation, half of the row of plates (11020, 11021, . . . 11027) may be activated.
Claims20
A semiconductor memory device, comprising:
- a memory cell array divided into a plurality of memory cell plates, each memory cell plate having a sub-word driver coupled to a sub-word line disposed in the row direction of the memory cell plate;
- a main word line disposed in the row direction of the memory cell array and coupled to the sub-word driver in a row of said memory cell plates;
- each memory cell plate having a plurality of bit lines, each bit line coupled to a sense amplifier;
- a normal mode of operation in which a sub-word line is selected in each of a plurality of memory cell plates in the row of the memory cell plates and sense amplifiers are activated to receive data provided;
- and
- a test mode of operation in which fewer memory cell plates in the row of memory cell plates have selected sub-word lines and activated sense amplifiers than in the normal mode of operation.
3 more elements
A semiconductor memory device, comprising:
- a memory cell array including a row of memory cell plates;
- a normal mode of operation in which a plurality of the memory cell plates are activated;
- and
- a test mode of operation in which fewer of the memory cell plates are activated than in the normal mode.
1 more element
A semiconductor memory device, comprising:
- a memory cell array including a row of memory cell areas coupled to a main word line;
- a normal mode of operation in which a plurality of the memory cell areas are activated;
- and
- a test mode of operation in which fewer of the memory cell areas are activated than in the normal mode.
1 more element
Dependencies are inferred from the claim text.