Ferroelectric memory cell array and method of storing data using the same
AssigneeElectronics and Telecommunications Research Institute
InventorsYil Suk Yang, Tae Moon Roh, Jong Dae Kim, Byoung Gon Yu
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AssigneeElectronics and Telecommunications Research Institute
InventorsYil Suk Yang, Tae Moon Roh, Jong Dae Kim, Byoung Gon Yu
Estimating the term…
The present invention relates to a ferroelectric memory cell array formed of a single transistor, and method of storing data using the same. The ferroelectric memory cell array includes a plurality of word lines connected to gates of the memory cells located at respective rows, a plurality of bit lines connected to drains of the memory cells located at respective columns, a common source line commonly connecting sources of the memory cells, and a plurality of well lines each connected to wells in which the memory cells are each formed, wherein a bias voltage of an unit pulse shape is applied to a gate of a selected memory cell and a bias voltage of a pulse shape is applied to a well line. Therefore, the present invention allows a random access without a disturbance since data can be written by means of the polarity characteristic of the ferroelectric.
A ferroelectric memory cell array, comprising:
A method of storing data using a ferroelectric memory cell array, said ferroelectric memory cell array including a plurality of word lines located in rows;
A ferroelectric memory cell array comprising:
Dependencies are inferred from the claim text.