Graphics processing system with enhanced bus bandwidth utilization and method therefore
AssigneeATI International SRL
InventorStephen L. Morein
Life of this patent
Estimating the term…
Abstract
A graphics processing system that includes a graphic processing circuit and an enhanced memory circuit is presented. The graphics processing circuit performs the rendering of graphics primitives to produce pixel fragment data. The pixel fragment data is then grouped into fragment blocks that are compressed and sent across a bus of limited bandwidth in an efficient manner to the enhanced memory circuit. Within the enhanced memory circuit, the compressed fragment blocks are decompressed and restored to their original state. Comparison and blending operations are then performed on a block-by-block basis with pixel data stored in the frame buffer.
Claims20
A graphics processing system comprising:
- a graphics processing circuit that includes:
- a graphics processing pipeline that generates pixel fragments;
- a fragment combining block operably coupled to the graphics processing pipeline, wherein the fragment combining block groups pixel fragments received from the graphics processing pipeline into fragment blocks, wherein each fragment block includes locations for a predetermined number of pixel fragments, wherein locations within each fragment block within which the fragment combining block has stored a pixel fragment are filled locations, wherein the fragment combining block outputs fragment blocks that are at least partially filled, wherein when the fragment combining block outputs a fragment block, the fragment block is accompanied by a set of flags, wherein the set of flags indicates which locations in the fragment block that is being outputted are filled locations;
- a packing block operably coupled to the fragment combining block, wherein the packing block generates a stream of data based on pixel fragments stored in filled locations within fragment blocks received from the fragment combining block, wherein the stream of data is constructed based on the set of flags that accompanies each fragment block received;
- and
- an enhanced memory circuit operably coupled to the graphics processing circuit, wherein the enhanced memory circuit includes:
- a frame buffer that stores image data corresponding to a frame;
- an unpacking block operably coupled to the packing block of the graphics processing circuit, wherein the unpacking block receives the stream of data and the sets of flags corresponding to the fragment blocks used to construct the stream of data, wherein the unpacking block reconstructs the fragment blocks used to construct the stream of data from the stream of data, wherein reconstruction of the fragment blocks utilizes the sets of flags corresponding to the fragment blocks used to construct the stream of data;
- and
- a render backend block operably coupled to the unpacking block and the frame buffer, wherein the render backend block blends pixel fragments contained within fragment blocks reconstructed by the unpacking block with image data in the frame buffer, wherein blending performed by the render backend block is on a block-by-block basis such that pixel fragments included in each fragment block are blended in parallel.
A method for transmitting data packets across a bus that connects a first integrated circuit and a second integrated circuit, comprising:
- receiving a data block within the first integrated circuit that includes a plurality of entries, wherein at least a portion of the entries are valid entries;
- generating a set of flags corresponding to the data block, wherein the set of flags indicates which entries of the data block are valid entries;
- compiling the data block into a set of transmission blocks, wherein each transmission block includes at least one valid entry, wherein the set of transmission blocks includes at least one transmission block;
- sending each transmission block across the bus to the second integrated circuit;
- sending the set of flags to the second integrated circuit;
- and
- reconstructing, in the second integrated circuit, the data block from the set transmission blocks and the set of flags.
A method for processing video graphics primitives, comprising:
- receiving a video graphics primitive;
- generating pixel fragments from the video graphics primitive;
- grouping portions of the pixel fragments in fragment blocks based on corresponding groupings within a frame buffer;
- when a fragment block is ready for blending, generating a set of flags for the fragment block, wherein the set of flags indicates which locations within the fragment block include valid pixel fragments;
- generating a stream of data based on valid pixel fragments included in the fragment block as indicated by the set of flags corresponding to the fragment block;
- and
- transmitting the stream of data along with the set of flags.
Dependencies are inferred from the claim text.