Load compensation technique for reactive impedance transformation amplifier output stage

Abstract

A method of selectively reducing the impedance presented to the load of a reactive impedance transformation amplifier output stage reduces distortion caused by load reactance. A control circuit is interconnected to a gated switch on at least one side of the load, and the switch is controlled to shunt back-EMF from the load. In one embodiment, the shunting action is initiated when the released energy would approach zero with a purely resistive load. Since the delay time may be a function of energy released, the delay from energy release to shunt initiation is optimally a function of the energy storage time of the inductor. In the event that this energy storage time is regulated using feedback, the shunt delay should be as well regulated, to accentuate the regulatory action. In a more comprehensive embodiment, the amplifier output polarity is inverted and its output caused to be a function of the positive error in the circumstance of a substantial positive error, such as that caused by an inductive load.

Dependencies are inferred from the claim text.