Bootstrap circuit to cancel input bias currents of a differential amplifier over most of common-mode input voltage range
AssigneeLinear Technology Corporation
InventorsWilliam H. Gross, Danh T. Tran
Life of this patent
Estimating the term…
Abstract
An electronic circuit to cancel the input bias currents of a differential amplifier over most of the common-mode input voltage range is provided. The circuit includes an arrangement of transistors, current mirror and current sources to track the input bias currents of the differential amplifier even when the common-mode voltage is within at least 0.2 volts of the supply rail voltage level. The input bias cancellation currents are generated by tracking the input bias currents and injected into the differential amplifier inputs to cancel the input bias currents. The circuit includes a bootstrap loop to track the input bias currents when the common-mode voltage fluctuates.
Claims21
A circuit (200) to cancel an input bias current of a differential amplifier, the circuit (200) comprising:
- an input stage of the differential amplifier including first and second PNP transistors (Q21 and Q22), the collector of the first PNP transistor (Q21) coupled to a first electronic load (240), the collector of the second PNP transistor (Q22) coupled to a second electronic load (250), and the first and second electronic loads (240 and 250) coupled to a negative supply rail (230);
- a tail current circuit (272) coupled to a positive supply rail (220) and the emitters of the first and second PNP transistors (Q21 and Q22);
- a compensating current circuit (Q24) coupled to the tail current circuit (272) and the positive supply rail (220);
- a third PNP transistor (Q25), the emitter of the third PNP transistor (Q25) coupled to the compensating current circuit (Q24), and the collector of the third PNP transistor (Q25) coupled to the negative supply rail (230);
- a first diode-connected NPN transistor (Q26), the collector of the first diode-connected NPN transistor (Q26) coupled to the base of the third PNP transistor (Q25);
- a first NPN transistor (Q27), the base of the first NPN transistor (Q27) coupled to the base of the first diode-connected NPN transistor (Q26), the emitter of the first NPN transistor (Q27) coupled to the emitter of the first diode-connected NPN transistor (Q26), and the collector of the first NPN transistor (Q27) coupled to the base of the second PNP transistor (Q22);
- a second NPN transistor (Q28), the bases of the second and first NPN transistors (Q28 and Q27) coupled to each other, the collector of the second NPN transistor (Q28) coupled to the base of the first PNP transistor (Q21), and the emitters of the second and first NPN transistors (Q28 and Q27) coupled to each other;
- and
- a bootstrap circuit (295) coupled to the emitters of the first and second PNP transistors (Q21 and Q22), the tail current circuit (272), the emitters of the first and second NPN transistors (Q27 and Q28) and the emitter of the first diode-connected NPN transistor (Q26);
- wherein the tail current circuit (272) generates a tail current for the first and second PNP transistors (Q21 and Q22);
- wherein the compensating current circuit (Q24) supplies a current such that the third PNP transistor (Q25) has a base current proportional to the input bias current;
- wherein the third PNP transistor (Q25) supplies the first diode-connected NPN transistor (Q26) with an input bias cancellation current;
- wherein the first and second NPN transistors (Q27 and Q28) supply the bases of the second and first PNP transistors (Q22 and Q21) with the input bias cancellation current respectively;
- wherein the bootstrap circuit (295) senses the emitters of the first and second PNP transistors (Q21 and Q22) and provides a bias to the first diode-connected NPN transistor (Q26);
- and
- wherein the circuit (200) can cancel the input bias current for common-mode voltages ranging up to within 0.2 direct current voltage (VDC) of the negative supply rail (230) voltage.
A circuit (200A) to cancel an input bias current of a differential amplifier, the circuit (200A) comprising:
- an input stage of the differential amplifier including first and second NPN transistors (Q21A and Q22A), the collector of the first NPN transistor (Q21A) coupled to a first electronic load (240), the collector of the second NPN transistor (Q22A) coupled to a second electronic load (250), and the first and second electronic loads (240 and 250) coupled to a positive supply rail (230A);
- a tail current circuit (272A) coupled to a negative supply rail (220A) and the emitters of the first and second NPN transistors (Q21A and Q22A);
- a compensating current circuit (Q24A) coupled to the tail current circuit (272A) and the negative supply rail (220A);
- a third NPN transistor (Q25A), the emitter of the third NPN transistor (Q25A) coupled to the compensating current circuit, and the collector of the third NPN transistor (Q25A) coupled to the positive supply rail (230A);
- a first diode-connected PNP transistor (Q26A), the collector of the first diode-connected PNP transistor (Q26A) coupled to the base of the third NPN transistor (Q25A);
- a first PNP transistor (Q27A), the base of the first PNP transistor (Q27A) coupled to the base of the first diode-connected PNP transistor (Q26A), the emitter of the first PNP transistor (Q27A) coupled to the emitter of the first diode-connected PNP transistor (Q26A), and the collector of the first PNP transistor (Q27A) coupled to the base of the second NPN transistor (Q22A);
- a second PNP transistor (Q28A), the bases of the second and first PNP transistors (Q28A and Q27A) coupled to each other, the collector of the second PNP transistor (Q28A) coupled to the base of the first NPN transistor (Q21A), and the emitters of the second and first PNP transistors (Q28A and Q27A) coupled to each other;
- a bootstrap circuit (295A) coupled to the emitters of the first and second NPN transistors (Q21A and Q22A), the tail current circuit (272A), the emitters of the first and second PNP transistors (Q27A and Q28A) and the emitter of the first diode-connected PNP transistor (Q26A);
- wherein the tail current circuit (272A) generates a tail current for the first and second NPN transistors (Q21A and Q22A);
- wherein the compensating current (Q24A) circuit supplies a current such that the third NPN transistor (Q25A) has a base current proportional to the input bias current;
- wherein the third NPN transistor (Q25A) supplies the first diode-connected PNP transistor (Q26A) with an input bias cancellation current;
- wherein the first and second PNP transistors (Q27A and Q28A) supply the bases of the second and first NPN transistors (Q22A and Q21A) with the input bias cancellation current respectively;
- wherein the bootstrap circuit (295A) senses the emitters of the first and second NPN transistors (Q21A and Q22A) and provides a bias to the first diode-connected PNP transistor (Q26A);
- and
- wherein the circuit (200A) can cancel the input bias current for common-mode voltages ranging up to within 0.2 direct current voltage (VDC) of the positive supply rail (230A) voltage.
A circuit (200 or 200A) to cancel an input bias current of a differential amplifier, the circuit (200 or 200A) comprising:
- an input stage of the differential amplifier including first and second one conductivity type transistors (Q21 and Q22 or Q21A and Q22A), the collector of the first one conductivity type transistor (Q21 or Q21A) coupled to a first electronic load (240), the collector of the second one conductivity type transistor (Q22 or Q22A) coupled to a second electronic load 250, and the first and second electronic loads (240 and 250) coupled to a first supply rail (230 or 230A);
- a tail current circuit (272 or 272A) coupled to a second supply rail (220 or 220A) and the emitters of the first and second one conductivity type transistors (Q21 and Q22 or Q21A and Q22A);
- a compensating current circuit (Q24 or Q24A) coupled to the tail current circuit (272 or 272A) and the second supply rail (220 or 220A);
- a third one conductivity type transistor (Q25 or Q25A), the emitter of the third one conductivity type transistor (Q25 or Q25A) coupled to the compensating current circuit (Q24 or Q24A), and the collector of the third one conductivity type transistor (Q25 or Q25A) coupled to the first supply rail (230 or 230A);
- a first diode-connected opposite conductivity type transistor (Q26 or Q26A), the collector of the first diode-connected opposite conductivity type transistor (Q26 or Q26A) coupled to the base of the third one conductivity type transistor (Q25 or Q25A);
- a first opposite conductivity type transistor (Q27 or Q27A), the base of the first opposite conductivity type transistor (Q27 or Q27A) coupled to the base of the first diode-connected opposite conductivity type transistor (Q26 or Q26A), the emitter of the first opposite conductivity type transistor (Q27 or Q27A) coupled to the emitter of the first opposite conductivity type diode-connected transistor (Q26 or Q26A), and the collector of the first opposite conductivity type transistor (Q27 or Q27A) coupled to the base of the second one conductivity type transistor (Q22 or Q22A);
- a second opposite conductivity type transistor (Q28 or Q28A), the bases of the second and first opposite conductivity type transistors (Q28 and Q27 or Q28A and Q27A) coupled to each other, the collector of the second opposite conductivity type transistor (Q28 or Q28A) coupled to the base of the first one conductivity type transistor (Q21 or Q21A), and the emitters of the second and first opposite conductivity type transistors (Q28 and Q27 or Q28A and Q27A) coupled to each other;
- a bootstrap circuit (295 or 295A) coupled to the emitters of the first and second one conductivity type transistors (Q21 and Q22 or Q21A and Q22A), the tail current circuit (272 or 272A), the emitters of the first and second opposite conductivity type transistors (Q27 and Q28 or Q27A and Q28A) and the emitter of the first diode-connected opposite conductivity type transistor (Q26 or Q26A);
- wherein the tail current circuit (272 or 272A) generates a tail current for the first and second conductivity type transistors (Q21 and Q22 or Q21A and Q22A);
- wherein the compensating current circuit (Q24 or Q24A) supplies a current such that the third one conductivity type transistor (Q25 or Q25A) has a base current proportional to the input bias current;
- wherein the third one conductivity type transistor (Q25 or Q25A) supplies the first diode-connected opposite conductivity type transistor (Q26 or Q26A) with an input bias cancellation current;
- wherein the first and second opposite conductivity type transistors (Q27 and Q28 or Q27A and Q28A) supply the bases of the second and first one conductivity type transistors (Q22 and Q21 or Q22A and Q21A) with the input bias cancellation current respectively;
- wherein the bootstrap circuit (295 and 295A) senses the emitters of the first and second one connectivity type transistors (Q21 and Q22 or Q21A and Q22A) and provides a bias to the first diode-connected opposite conductivity type transistor (Q26 or Q26A);
- and
- wherein the circuit (200 or 200A) can cancel the input bias current for common-mode voltages ranging up to within 0.2 direct current voltage (VDC) of the first supply rail (230 or 230A) voltage.
Dependencies are inferred from the claim text.