Method and input circuit for evaluating a data signal at an input of a memory component

A circuit configuration for evaluating a data item in a double data-rate data signal at an input of a memory component, comprising:

• an input circuit configured for:
• obtaining an integration result by integrating the double data-rate data signal between a start time and an end time,
• using a control signal to specify the start time and the end time, said control signal being a data strobe signal provided for transferring the double data-rate data signal,
• based on a duration of the data signal, stipulating an integration period between the start time and the end time, and
• based on the integration result, assigning a logic data value to the data item.

An input circuit for a memory component for evaluating a data item in a double data-rate data signal, comprising:

• a comparator device for obtaining a comparison result;
• an integration device for obtaining an integration value by integrating the double data-rate data signal over an integration period based on a length of time that the data item is present;
• a control input for receiving a control signal specifying a beginning of the integration period and an ending of the integration period, said control signal being a data strobe signal in a double data-rate transfer system;
• and
• a switching device for applying the double data-rate data signal to said integration device, said switching device being connected to said comparator device;
• said comparator device obtaining the comparison result by comparing the integration value with a prescribed threshold value when the integration period has elapsed and said comparator device determining a logic data value for the data item based on the comparison result.