Method for the generation of pulse-width-modulated signals and associated signal generator
AssigneeSTMicroelectronics S.r.l.
InventorVincent Onde
Life of this patent
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Abstract
A pulse-width-modulated signal is generated out of a sampled reference signal. The least significant bits of a sample of the reference signal are stored in a comparison register. At the same time, a check is made in a test circuit to find out if the sample considered corresponds to a maximum amplitude of the reference signal. If this is the case, an overflow bit is given. The overflow bit and the least significant bits of the sample considered are then linked together to obtain a comparison word. The comparison word is compared with a number given by the counter to generate the pulse-width-modulated signal.
Claims23
A method for generating a pulse-width-modulated signal from a reference signal, the method comprising:
- incrementing a counter at each pulse of a clock signal to produce a number;
- updating a reference number related to the reference signal each time the counter reaches a setting value;
- comparing a pointer value with a reference parameter to compute an overflow bit, the pointer value being updated each time the counter reaches the setting value;
- and
- comparing the number given by the counter with an updated comparison word comprising, in most significant bits, the computed overflow bit, and in least significant bits, the updated reference number for generating the pulse-width-modulated signal.
A pulse-width-modulated (PWM) signal generator comprising:
- a counter having an input for receiving a clock signal, and an output for providing a number that is incremented at each pulse of the clock signal;
- a comparison register having an input for receiving a reference number related to a reference signal, the reference number being updated each time said counter reaches a setting value;
- a test circuit having an input for receiving a pointer value, and comparing the pointer value with a reference parameter to compute an overflow bit, the pointer value being updated each time said counter reaches the setting value;
- an overflow register having an input connected to said test circuit for storing the computed overflow bit;
- and
- a comparator having a first input connected to said counter, a second input connected to said comparison register, and a third input connected to said overflow register for comparing the number given by said counter with an updated comparison word comprising, in most significant bits, the computed overflow bit, and in least significant bits, the updated reference number for generating a pulse width-modulated signal.
A combination of a motor and at least one pulse-width-modulated (PWM) signal generator connected thereto, said at least one PWM signal generator comprising:
- a counter having an input for receiving a clock signal, and an output for providing a number that is incremented at each pulse of the clock signal;
- a comparison register having an input for receiving a reference number related to a reference signal, the reference number being updated each time said counter reaches a setting value;
- a test circuit having an input for receiving a pointer value, and comparing the pointer value with a reference parameter to compute an overflow bit, the pointer value being updated each time said counter reaches the setting value;
- an overflow register having an input connected to said test circuit for storing the computed overflow bit;
- and
- a comparator having a first input connected to said counter, a second input connected to said comparison register, and a third input connected to said overflow register for comparing the number given by said counter with an updated comparison word comprising, in most significant bits, the computed overflow bit, and in least significant bits, the updated reference number for generating a pulse-width-modulated signal for controlling the motor.
Dependencies are inferred from the claim text.