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US 6,636,076 B2Granted
Quad state logic design methods, circuits, and systems
AssigneeTexas Instruments Incorporated
InventorLee D. Whetsel
Life of this patent
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Abstract
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring interconnects between memories and logic elements results in higher speed, higher density, and lower power integrated circuit designs.
Claims1
A memory for storing any one of four voltage level inputs comprising;
- an input for receiving said voltage level inputs,
- storage circuitry for latching said voltage level inputs,
- circuitry for performing logical operations on said latched voltage levels,
- a first output for transmitting said latched voltage levels from the memory, and,
- a second output for transmitting a signal indicative of a logical operation performed on said latched voltage levels.
2 more elements
Dependencies are inferred from the claim text.