Method of forming a spin-on-glass insulation layer
AssigneeSamsung Electronics Co., Ltd.
InventorsJu-Seon Goo, Eun-Kee Hong, Hong-Gun Kim, Jin-Gi Hong
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Abstract
A method of forming a SOG insulation layer of a semiconductor device comprises forming the SOG insulation layer on a substrate having a stepped pattern by using a polysilazane in a solution state, performing a pre-bake process for removing solvent elements of the insulation layer at a temperature of 50 to 350° C., performing a hard bake process for restraining particles from forming at a temperature of 350 to 500° C., and annealing at a temperature of 600 to 1200° C. The method of the invention further includes planarizing the insulation layer between the hard bake process and the annealing step. Also, the hard bake process can be omitted.
Claims11
A method of forming a SOG insulation layer of a semiconductor device comprising:
- forming said SOG insulation layer on a substrate having a stepped pattern using a polysilazane in a solution state;
- performing a pre-bake process for removing solvent ingredients in said insulation layer at a temperature of 50 to 350° C.;
- performing a hard bake process for restraining particles from forming, the hard bake process being performed at a temperature of 350 to 500° C.;
- annealing at a temperature of 600 to 1200° C.;
- and
- planarizing said insulation layer between said hard bake process step and said annealing step.
A method of forming a SOG insulation layer of a semiconductor device comprising the steps of:
- forming said SOG insulation layer on a substrate having a stepped pattern using a polysilazane;
- performing a bake process for removing solvent elements of said insulation layer at a temperature of below 500° C.;
- planarizing said insulation layer after said bake process step;
- and
- annealing said insulation layer at a temperature of 600 to 1200° C. after said planarizing step.
Dependencies are inferred from the claim text.