Semiconductor processing methods of forming a contact opening to a conductive line and methods of forming substrate active area source/drain regions

A semiconductor processing method of forming a contact opening to a conductive word line which overlies a substrate active area comprising:

• forming a conductive word line over a substrate, a portion of the word line extending over a substrate active area;
• encapsulating the word line with nitride encapsulating material;
• forming an oxide layer over the substrate, the oxide layer covering the conductive word line and the substrate active area;
• in a common step, patterning and etching the oxide layer to outwardly expose at least one desired substrate active area into which p-type impurity is to be provided, the etching also forming a contact opening over a portion of the conductive word line overlying a field isolation region;
• and
• wherein the etching step etches the oxide material at substantially the same rate as the nitride encapsulating material.

A semiconductor processing method comprising:

• forming at least one conductive gate line over a substrate, the gate line including a silicide layer, the gate line extending over a substrate active area;
• providing a nitride material over the silicide layer;
• forming an oxide layer over the at least one conductive line and the substrate active area;
• conducting an anisotropic etch to a degree sufficient to:
• (a) remove at least some of the nitride material over the conductive line to define a contact opening thereto and, (b) remove enough of the oxide layer over the substrate active area to expose source/drain regions into which p-type impurity is to be added;
• and
• wherein the nitride material and the oxide layer are etched at substantially the same rate.

A semiconductor processing method of forming a contact opening to a conductive line comprising:

• forming a conductive line over a substrate, the conductive line having a conductive portion and a protective portion over the conductive portion, the protective portion comprising at least a silicon nitride layer atop the conductive line and a silicon oxide layer atop the silicon nitride layer, at least a part of the conductive line extending over a substrate active area;
• forming encapsulation material over the conductive line and its protective portion;
• and
• in a common masking step, etching a doping window opening over the substrate active area adjacent the line and removing at least some of the encapsulation material and some of the protective portion of the conductive line to form a contact opening to the conductive line.

A semiconductor method of forming a conductive line comprising:

• forming a conductive gate stack atop a substrate;
• forming a silicon nitride layer atop the gate stack;
• forming a silicon oxide layer atop the silicon nitride layer;
• forming encapsulation material over the silicon oxide layer, the silicon nitride layer and the conductive gate stack;
• selectively removing at least some of the encapsulation material relative to the silicon oxide layer;
• and
• selectively removing at least some of the silicon oxide layer relative to the silicon nitride layer, the removing steps defining at least part of a contact opening over the gate stack.

A semiconductor CMOS processing method of forming CMOS circuitry comprising:

• forming a substrate comprising a plurality of layers;
• etching at least some of the plurality of layers to form at least one conductive gate line, the at least one gate line overlying a field isolation region and having a conductive line top;
• forming a nitride material over at least a portion of the conductive line top;
• forming an oxide layer over the nitride material;
• planarizing the oxide layer;
• forming a photoresist layer over the planarized oxide layer;
• in a common masking step, patterning the photoresist layer to form a pattern configured for forming a contact opening over the conductive gate line and a doping window pattern over active area of the substrate adjacent the gate line, the contact opening pattern and the doping window pattern having respective lateral width dimensions, the contact opening pattern width dimension being less than the doping window pattern width dimension;
• anisotropically etching both the nitride material and the oxide layer at substantially the same rate to respectively define the contact opening to the conductive gate line and a doping window over the substrate active area adjacent the gate line;
• and
• doping desired areas of the substrate active area with a p-type impurity to form at least a portion of one source/drain region.

A semiconductor processing method of forming PMOS circuitry having PMOS source/drain regions over a silicon substrate comprising:

• providing p-type impurity to a first concentration into previously exposed PMOS source/drain active areas formed on the substrate;
• forming a masking layer over the substrate;
• patterning and etching the masking layer to form openings over the PMOS source/drain active areas;
• and
• providing p-type impurity through the openings into the PMOS source/drain active areas to a second concentration which is greater than the first concentration, wherein the patterning and etching comprises forming at least one contact opening to a conductive line formed over the substrate.

A semiconductor processing method comprising:

• forming at least one conductive gate line over a bulk monocrystalline silicon substrate, the gate line including a silicide layer, the gate line overlying a field isolation region and extending laterally away therefrom and over substrate active area;
• providing a nitride material over the silicide layer;
• forming an oxide layer over the at least one conductive line and the substrate active area;
• and
• conducting an anisotropic etch to a degree sufficient to:
• (a) remove at least some of the nitride material over the conductive line to define a contact opening thereto and, (b) remove enough of the oxide layer over the substrate active area to expose source/drain regions into which p-type impurity is to be added, wherein the nitride material and the oxide layer are etched at substantially the same rate.

A semiconductor processing method of forming a contact opening to a conductive line comprising:

• forming a conductive line over a bulk monocrystalline silicon substrate, the conductive line having a conductive portion and a protective portion over the conductive portion, the protective portion comprising at least a silicon nitride layer atop the conductive line and a silicon oxide layer atop the silicon nitride layer, at least a part of the conductive line extending over a substrate active area;
• forming silicon nitride encapsulation material over the conductive line and its protective portion;
• and
• in a common masking step, etching a doping window opening over the substrate active area adjacent the line and removing at least some of the silicon nitride encapsulation material and some of the protective portion of the conductive line to form a contact opening to the conductive line.