Method of manufacturing an active matrix type semiconductor display device

A method of manufacturing an electroluminescence display device comprising:

• forming a first and a second semiconductor layers over a substrate;
• forming a gate insulating film over the first and the second semiconductor layers;
• forming gate electrodes over the first and the second semiconductor layers with the gate insulating film interposed therebetween;
• introducing a first impurity element into portions of the first and the second semiconductor layers so as to form first impurity regions, wherein the first impurity regions overlap the gate electrodes;
• introducing a second impurity element into portions of the first and the second semiconductor layers so as to form second impurity regions in contact with the first impurity regions;
• and
• introducing a third impurity element into portions of the first semiconductor layer so as to form third impurity regions in contact with the second impurity regions.

A method of manufacturing an electroluminescence display device comprising:

• forming a first and a second semiconductor layers over a substrate;
• forming a gate insulating film over the first and the second semiconductor layers;
• forming gate electrodes over the first and the second semiconductor layers with the gate insulating film interposed therebetween;
• introducing a first impurity element into portions of the first and the second semiconductor layers so as to form first impurity regions;
• introducing a second impurity element into portions of the first and the second semiconductor layers so as to form second impurity regions in contact with the first impurity regions;
• introducing a third impurity element into portions of the first semiconductor layer so as to form third impurity regions in contact with the second impurity regions;
• and
• introducing a fourth impurity element into portions of the second semiconductor layer so as to form fourth impurity regions.

A method of manufacturing an electroluminescence display device comprising:

• forming a first and a second semiconductor layers over a substrate;
• forming a gate insulating film over the first and the second semiconductor layers;
• forming gate electrodes over the first and the second semiconductor layers with the gate insulating film interposed therebetween;
• introducing a first impurity element into portions of the first and the second semiconductor layers so as to form first impurity regions;
• forming side walls adjacent to the gate electrodes after introducing the first impurity element;
• introducing a second impurity element into portions of the first and the second semiconductor layers so as to form second impurity regions in contact with the first impurity regions;
• and
• introducing a third impurity element into portions of the first semiconductor layer so as to form third impurity regions in contact with the second impurity regions.

A method of manufacturing an electroluminescence display device comprising:

• forming a first and a second semiconductor layers over a substrate;
• forming a gate insulating film over the first and the second semiconductor layers;
• forming gate electrodes over the first and the second semiconductor layers with the gate insulating film interposed therebetween;
• introducing a first impurity element into portions of the first and the second semiconductor layers so as to form first impurity regions, wherein the first impurity regions overlap the gate electrodes;
• introducing a second impurity element into portions of the first and the second semiconductor layers so as to form second impurity regions in contact with the first impurity regions;
• introducing a third impurity element into portions of the first semiconductor layer so as to form third impurity regions in contact with the second impurity regions;
• and
• introducing a fourth impurity element into portions of the second semiconductor layer so as to form fourth impurity regions.

A method of manufacturing an electroluminescence display device comprising:

• forming a first and a second semiconductor layers over a substrate;
• forming a gate insulating film over the first and the second semiconductor layers;
• forming gate electrodes over the first and the second semiconductor layers with the gate insulating film interposed therebetween;
• introducing a first impurity element into portions of the first and the second semiconductor layers so as to form first impurity regions, wherein the first impurity regions overlap the gate electrodes;
• forming side walls adjacent to the gate electrodes after introducing the first impurity element;
• introducing a second impurity element into portions of the first and the second semiconductor layers so as to form second impurity regions in contact with the first impurity regions;
• and
• introducing a third impurity element into portions of the first semiconductor layer so as to form third impurity regions in contact with the second impurity regions.