Soldermask opening to prevent delamination
AssigneeMicron Technology, Inc.
InventorBrad D. Rumsey
Life of this patent
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Abstract
A multilayer circuit board includes a base layer, a conductive layer and a soldermask. The soldermask layer has two sets of openings. One of the openings are vent openings, that expose the base layer to provide ventilation so that gases may escape during processing. The second openings expose selective regions of a conductor layer. The multi-layer circuit board provides for less occurrences of delamination.
Claims34
A method of venting a circuit board, the method comprises:
- providing a base layer;
- providing a conductive layer to a top side of the base layer;
- providing a soldermask layer to a top second side of the conductive layer;
- establishing a preferred region of the soldermask to form a first plurality of openings;
- forming the first plurality of openings in the soldermask layer to expose only the base layer beneath the soldermask layer to provide ventilation;
- and
- providing a second plurality of openings in the soldermask layer to expose regions of the conductive layer.
A method of venting a circuit board, the method comprises:
- providing a base layer;
- providing a conductive layer to a top side of the base layer;
- providing a soldermask layer to a top second side of the conductive layer;
- establishing a preferred region of the soldermask to form a first plurality of openings;
- forming the first plurality of openings in the soldermask layer to expose at least the base layer beneath the soldermask layer to provide ventilation;
- and
- providing a second plurality of openings in the soldermask layer to expose regions of the conductive layer wherein providing the base layer includes providing a die access opening and attaching a die to the base layer adjacent the die access opening.
A method of forming a circuit board, comprising:
- forming a conductive layer on a base;
- laminating a soldermask to the base over the conductive layer;
- forming a plurality of openings in the soldermask over a region of the base that is free of conductors;
- and
- venting the region of the base through the plurality of openings so as to prevent delamination of the soldermask from the base layer during subsequent processing.
A method of forming a circuit board, comprising:
- forming a conductive layer on a base;
- laminating a soldermask to the base over the conductive layer;
- forming a plurality of openings in the soldermask over a region of the base that is free of conductors;
- venting the region of the base through the plurality of openings so as to prevent delamination of the soldermask from the base layer during subsequent processing;
- and
- attaching an integrated circuit to the base.
A method of forming a circuit board, comprising:
- forming a conductive layer on a first side of a base;
- laminating a soldermask to the first side of the base over the conductive layer;
- forming a plurality of openings in the soldermask over a region of the base that is free of conductors;
- venting the region of the base through the plurality of openings so as to prevent delamination of the soldermask from the base layer during subsequent processing;
- and
- attaching an integrated circuit to a second side of the base.
A method of forming a circuit board, comprising:
- forming a conductive layer on a first side of a base;
- laminating a soldermask to the first side of the base over the conductive layer;
- forming a plurality of openings in the soldermask over a region of the base that is free of conductors;
- venting the region of the base through the plurality of openings so as to prevent delamination of the soldermask from the base layer during subsequent processing;
- attaching an integrated circuit to a second side of the base;
- mounting an electrical component over the soldermask;
- and
- electrically connecting the electrical component to at least one conductive trace of the conductive layer.
A method of forming a circuit board, comprising:
- providing a base having first and second regions;
- forming conductive traces on the first region;
- adhering a soldermask to the first and second regions;
- forming openings in the soldermask over the first region to provide access to the conductive traces;
- and
- forming vent holes in the soldermask to the second region so that gasses are vented from the base through the vent holes to prevent delamination of the soldermask from the base.
A method of forming a circuit board, comprising:
- providing a base having first and second regions;
- forming conductive traces on the first region;
- adhering a soldermask to the first and second regions;
- forming openings in the soldermask over the first region to provide access to the conductive traces;
- forming vent holes in the soldermask to the second region so that gasses are vented from the base through the vent holes to prevent delamination of the soldermask from the base;
- and
- wherein forming vent holes includes maximizing surface area of the vent holes in locations not containing conductors.
A method of forming a circuit board, comprising:
- providing a base having first and second regions;
- forming conductive traces on the first region;
- adhering a soldermask to the first and second regions;
- forming openings in the soldermask over the first region to provide access to the conductive traces;
- forming vent holes in the soldermask to the second region;
- and
- expelling gasses through the vent holes without adversely affecting the adherence of the soldermask.
A method of forming a circuit board, comprising:
- providing a base having first and second regions;
- forming conductive traces on the first region;
- adhering a soldermask to the first and second regions;
- forming openings in the soldermask over the first region to provide access to the conductive traces;
- forming vent holes in the soldermask to the second region;
- expelling gasses through the vent holes without adversely affecting the adherence of the soldermask;
- and
- wherein forming vent holes includes maximizing surface area of the vent holes in locations not containing conductors.
Dependencies are inferred from the claim text.