User controlled relaxation of optimization constraints related to volatile memory references
AssigneeHewlett-Packard Development Company, L.P.
InventorVatsa Santhanam
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Abstract
A regime of keywords modifying a volatile type-qualifier for use in source code accessing volatile objects via, for example, pointers to volatile memory locations. Each keyword permits corresponding selected optimizations by a compiler even though the volatile type-qualifier is also declared. Users select and combine keywords so as to relax corresponding optimization constraints otherwise ordained by use of the volatile type-qualifier.
Claims13
A computer program compiler disposed to accept code expressed at a first level, wherein said first level is a source code language, said source code language supporting data-type extensions to declare objects as volatile, and to transform sequences of said accepted code into a second level thereof according to a regime of rules, wherein the compiler invokes selected ones of said rules responsive to identification of corresponding selected words in said accepted code, said corresponding selected words including optimization restriction words, said selected ones of said rules including corresponding optimization restriction rules, said optimization restriction rules operable, responsive to identification of corresponding optimization restriction words, to restrict selected optimizations by the compiler of code at said second level thereof, the compiler comprising:
- at least one keyword operable to be associated with ones of said optimization restriction words;
- and
- each keyword further operable, responsive to identification thereof by the compiler, to relax selected optimization restriction rules corresponding to the optimization restriction words with which said keyword is associated.
A computer program compiler disposed to accept code expressed at a first level and to transform sequences of said accepted code into a second level thereof according to a regime of rules, wherein the compiler invokes selected ones of said rules responsive to identification of corresponding selected words in said accepted code, said corresponding selected words including optimization restriction words, said selected ones of said rules including corresponding optimization restriction rules, said optimization restriction rules operable, responsive to identification of corresponding optimization restriction words, to restrict selected optimizations by the compiler of code at said second level thereof, the compiler comprising:
- at least one keyword operable to be associated with ones of said optimization restriction words;
- each keyword further operable, responsive to identification thereof by the compiler, to relax selected optimization restriction rules corresponding to the optimization restriction words with which said keyword is associated;
- and
- each keyword further operable to relax synchronicity restrictions on volatile memory access.
A computer program compiler disposed to accept code expressed at a first level and to transform sequences of said accepted code into a second level thereof according to a regime of rules, wherein the compiler invokes selected ones of said rules responsive to identification of corresponding selected words in said accepted code, said corresponding selected words including optimization restriction words, said selected ones of said rules including corresponding optimization restriction rules, said optimization restriction rules operable, responsive to identification of corresponding optimization restriction words, to restrict selected optimizations by the compiler of code at said second level thereof, the compiler comprising:
- at least one keyword operable to be associated with ones of said optimization restriction words;
- each keyword further operable, responsive to identification thereof by the compiler, to relax selected optimization restriction rules corresponding to the optimization restriction words with which said keyword is associated;
- and
- each keyword further operable to relax restrictions on machine instruction execution sequence based on the relative sequence of volatile memory accesses and selected non-volatile memory accesses.
Dependencies are inferred from the claim text.