Decoding circuit for memories with redundancy

A method of disabling defective memory elements of a memory array, comprising:

• determining prior to normal operation of the memory array whether a particular memory element is functional or defective;
• decoding a requested address with an address decoder;
• receiving an element-select signal from the address decoder indicating whether access to the memory element is requested by a host;
• if the memory element is functional, enabling or disabling the memory element in accordance with the element-select signal;
• and
• if the memory element is defective, disabling the memory element regardless of the element-select signal.

A system of handling defective memory elements in a memory array, comprising:

• a memory array including a plurality of memory elements;
• an address decoder adapted to receive a requested memory address and to produce a plurality of element-select signals, each element-select signal being associated with one of the memory elements and indicating whether access to the associated memory element is requested by a host;
• and
• a logic circuit having first and second inputs and an output, the first input being coupled to the associated element-select signal, the second input being coupled to a condition signal representative of whether the associated memory element is functional or defective, and the output being coupled to the associated memory element, wherein the logic circuit passes the associated element-select signal to the associated memory element or blocks the associated element-select signal from reaching the associated memory element based on the condition signal.